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MB90800 Datasheet(PDF) 35 Page - Fujitsu Component Limited. |
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MB90800 Datasheet(HTML) 35 Page - Fujitsu Component Limited. |
35 / 92 page ![]() MB90800 Series DS07-13733-6E 35 5. 8/10-bit A/D converter The feature of 8/10-bit A/D converter is shown as follows. • conversion time : 3.1 μs minimum per 1 channel (78 machine cycle/at machine clock 25 MHz/including the sampling time) • Sampling time : 2.0 μs minimum per 1channel (50 machine cycle/at machine clock 25 MHz) • Uses RC-type successive approximation conversion method with a sample & hold circuit • 8-bit resolution or 10-bit resolution can be select. • 12 channel program-selectable analog inputs. Single conversion mode : Convert specified 1 channel Scan conversion mode : Continuous plural channels (maximum 12 channels can be programmed) are converted. Continuous conversion mode : Selected channel converted continuously. Stop conversion time : Perform conversion for one channel, then pause it to wait for the next activation trigger (synchronizes the conversion start timing) •EI2OS can be activated by outputting the interrupt request when the A/D conversion completes. • If the A/D conversion is performed under the condition of the interrupt enable, the converting data will be protected. • Selectable conversion activation trigger : Software, or reload timer (rising edge) (1) Register list ADCS1, ADCS0 (Control status register) ADCR1, ADCR0 (Data register) - : Unused ADCS0 bit Initial Value Address : 000034H 00 - - - - - - B Read/Write ADCS1 bit Initial Value Address : 000035H 00000000B Read/Write ADCR0 bit Initial Value Address : 000036H XXXXXXXXB Read/Write ADCR1 bit Initial Value Address : 000037H 00101 - XXB Read/Write R/W ⎯⎯ ⎯ ⎯ ⎯ ⎯ 76 5 4 3 2 1 0 MD0 R/W MD1 ⎯⎯⎯⎯ ⎯⎯ R/W R/W R/W R/W R/W W R/W 15 14 13 12 11 10 9 8 INT R/W BUSY INTE PAUS STS1 STS0 STRT Reserved RR R R R R R 76 5 4 3 2 1 0 D6 R D7 D5 D4 D3 D2 D1 D0 WWW W ⎯ RR 15 14 13 12 11 10 9 8 ST1 W S10 ST0 CT1 CT0 ⎯ D9 D8 |
Similar Part No. - MB90800_09 |
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Similar Description - MB90800_09 |
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