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HEF4521B Datasheet(PDF) 7 Page - NXP Semiconductors

Part # HEF4521B
Description  24-stage frequency divider and oscillator
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

HEF4521B Datasheet(HTML) 7 Page - NXP Semiconductors

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HEF4521B_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 5 November 2009
7 of 17
NXP Semiconductors
HEF4521B
24-stage frequency divider and oscillator
12. Dynamic characteristics
[1]
The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).
Table 8.
Dynamic characteristics
VSS = 0 V; Tamb = 25 °C; for test circuits see Figure 6; unless otherwise specified.
Symbol
Parameter
Conditions
VDD
Extrapolation formula
Min
Typ
Max
Unit
tPHL
HIGH to LOW
propagation delay
A2 to Q18;
see Figure 5
5 V
[1]
923 ns + (0.55 ns/pF) CL
-
950
1900
ns
10 V
339 ns + (0.23 ns/pF) CL
-
350
700
ns
15 V
212 ns + (0.16 ns/pF) CL
-
220
440
ns
Qn to Qn + 1;
see Figure 5
5 V
13 ns + (0.55 ns/pF) CL
-40
80
ns
10 V
4 ns + (0.23 ns/pF) CL
-15
30
ns
15 V
2 ns + (0.16 ns/pF) CL
-10
20
ns
MR to Qn
5 V
93 ns + (0.55 ns/pF) CL
-
120
240
ns
10 V
44 ns + (0.23 ns/pF) CL
-
55
110
ns
15 V
32 ns + (0.16 ns/pF) CL
-40
80
ns
A1 to Y1;
see Figure 5
5 V
63 ns + (0.55 ns/pF) CL
-
90
180
ns
10 V
24 ns + (0.23 ns/pF) CL
-35
70
ns
15 V
17 ns + (0.16 ns/pF) CL
-25
50
ns
tPLH
LOW to HIGH
propagation delay
A2 to Q18;
see Figure 5
5 V
[1]
923 ns + (0.55 ns/pF) CL
-
950
1900
ns
10 V
339 ns + (0.23 ns/pF) CL
-
350
700
ns
15 V
212 ns + (0.16 ns/pF) CL
-
220
440
ns
Qn to Qn + 1;
see Figure 5
5 V
13 ns + (0.55 ns/pF) CL
-40
80
ns
10 V
4 ns + (0.23 ns/pF) CL
-15
30
ns
15 V
2 ns + (0.16 ns/pF) CL
-10
20
ns
A1 to Y1;
see Figure 5
5 V
33 ns + (0.55 ns/pF) CL
-
60
120
ns
10 V
19 ns + (0.23 ns/pF) CL
-30
60
ns
15 V
12 ns + (0.16 ns/pF) CL
-20
40
ns
tt
transition time
Qn; see Figure 5
5 V
[1]
10 ns + (1.00 ns/pF) CL
-
60
120
ns
10 V
9 ns + (0.42 ns/pF) CL
-30
60
ns
15 V
6 ns + (0.28 ns/pF) CL
-20
40
ns
tW
pulse width
A2 HIGH;
minimum width;
see Figure 5
5 V
80
40
-
ns
10 V
40
20
-
ns
15 V
30
15
-
ns
MR HIGH;
minimum width;
see Figure 5
5 V
70
35
-
ns
10 V
40
20
-
ns
15 V
30
15
-
ns
trec
recovery time
MR; see Figure 5
5 V
+20
−10
-
ns
10 V
+15
−5-
ns
15 V
15
0
-
ns
fmax
maximum frequency
A1; see Figure 5
5 V
6
12
-
MHz
10 V
12
25
-
MHz
15 V
17
35
-
MHz


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