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DS3065WP Datasheet(PDF) 12 Page - Maxim Integrated Products |
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DS3065WP Datasheet(HTML) 12 Page - Maxim Integrated Products |
12 / 15 page 3.3V, 8Mb, Nonvolatile SRAM with Clock 12 When the RTC register values match alarm register set- tings, the alarm flag (AF) is set to 1. The AE and ABE bits are reset to 0 during the power-up transition, but an alarm generated during power-up sets AF to 1. Therefore, the AF bit can be read after system power-up to determine if an alarm was generated during the power-up sequence. Figure 1 illustrates alarm timing during battery-backup mode and power-up states. Clock Accuracy The DS3065WP and DS9034I-PCX+ are each individually tested for accuracy. Once mounted together, the module typically keeps time accuracy to within Q1.53 minutes per month (35ppm) at +25NC and does not require additional calibration. For this reason, methods of field clock calibration are not available and not necessary. The electrical environment also affects clock accuracy, and caution should be taken to place the component in the lowest level EMI section of the PCB layout. For addi- tional information, refer to Application Note 58: Crystal Considerations with Dallas Real-Time Clocks (RTCs). Power-On Default States Upon each application of power to the device, the fol- lowing register bits are automatically set to 0: WDS = 0, BMB[4:0] = 0, RB0 = 0, RB1 = 0, AE = 0, ABE = 0. All other RTC bits are undefined. Data-Retention Mode The device provides full functional capability for VCC greater than 3.0V and write protects by 2.8V. Data is maintained in the absence of VCC without additional sup- port circuitry. The NV SRAM constantly monitors VCC. Should the supply voltage decay, the NV SRAM auto- matically write protects itself. All inputs become don’t care, and all data outputs become high impedance. As VCC falls below approximately 2.5V (VSW), the power- switching circuit connects the lithium energy source to the clock and SRAM to maintain time and retain data. During power-up, when VCC rises above VSW, the pow- er-switching circuit connects external VCC to the clock and SRAM and disconnects the lithium energy source. Normal clock or SRAM operation can resume after VCC exceeds VTP for a minimum duration of tREC. Freshness Seal When the DS9034I-PCX+ battery cap is first attached to a DS3065WP base, the RTC oscillator is disabled and the lithium battery is electrically disconnected, guaran- teeing that no battery capacity has been consumed dur- ing transit or storage. When VCC is first applied at a level greater than VTP, the lithium battery is enabled for backup operation. The user is required to enable the oscillator (MSB of the SECONDS register) and initialize the required RTC reg- isters for proper timekeeping operation. Figure 1. Battery-Backup Mode Alarm Waveforms VCC VTP ABE, AE AF |
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