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S1D2502B01 Datasheet(PDF) 2 Page - Samsung semiconductor |
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S1D2502B01 Datasheet(HTML) 2 Page - Samsung semiconductor |
2 / 61 page VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS S1D2502B01 1 Preliminary BLOCK DIAGRAM Figure 1. Functional Block Diagram Latches D/A ROM (448 x 18 x 12) VDD VDDA ROM (480 x 16) Data Receiver OSD PLL Control Register Display Controller Output Stage Font Data Timing Controller Frame Ctrl ROM Ctrl Band Gap.Ref Multi (3 mode) Half Tone RGB OSD FBL INTE HT DET. BLK Int Clamp Pulse Gen. CLP BLK HFLB CLK H_Pulse V_Pulse I2C bus decoder 32 1 3 30 29 6 2 V/I 27 26 25 V/I V/I R cut off G cut off B cut off R/G/B OSD FBLK Intensity 10 ABL Video Input Clamp Video Half Tone SW Sub Cont. Control Video Contrast OSD Input Cilp. OSD Half Tone SW OSD Cont. Control I2C I2C I2C FBLK FBLK I2C CLP HT DET. 12 7 R OSD + Sub Cont. Control 24 Birght Control BLK CLP I2C 22 23 I2C Cont. Cntl G-CHANNEL B-CHANNEL CLP HT DET. FBLK CLP BLK I2C CLP HT DET. FBLK CLP BLK I2C 16 14 G OSD B OSD 13 15 8 5 4 9 11 28 31 20 21 17 18 VSSA HFLB VFLB VCO_IN_P SDA SCL RCT GCT BCT CLP_IN R OUT VCC2 R CLP G CLP G OUT B CLP B OUT VSS VCC3 GND3 VREF1 VREF ABL CONT_CAP RIN GND1 VCC1 GIN BIN ROM Address RAM Data 9 16 16 Ctrl Data 12 Display Ctrl H/V/CLK Ctrl H/V/CLK Ctrl Frame Ctrl ROM Ctrl Amp Out Ctrl Font 19 GND2 |
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