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S1D2502B01 Datasheet(PDF) 43 Page - Samsung semiconductor |
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S1D2502B01 Datasheet(HTML) 43 Page - Samsung semiconductor |
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43 / 61 page  S1D2502B01 VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS 42 Preliminary • Positioning The frame control register-2's HP Bit [F:8] signifies delay of the horizontal display from the H-Sync reference edge to the character's 1st pixel location, and is controlled by multiplying HP [F:8]'s range value by 6. Also, VP bit[7:0] signifies the top margin height from the V-Sync reference edge, and is controlled by multiplying 4 to the VP [7:0]'s range value. Refer to the Figure shown below. Figure 17. Frame Composition with the OSD Characters 15 rows (=15 x 18 lines) HP[7:0] (HFLB) Background Screen 30 columns (= 30 x 12 dots) OSD characters |
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