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S1D2502B01 Datasheet(PDF) 4 Page - Samsung semiconductor |
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S1D2502B01 Datasheet(HTML) 4 Page - Samsung semiconductor |
4 / 61 page VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS S1D2502B01 3 Preliminary Table 1. Pin Configuration Pin No. Symbol I/O Configuration 1 VFLB I Vertical flyback signal 2 VSSA - Ground (PLL part) 3 VCO_IN_P I This voltage is generated at the external loop filter and goes into the input stage of the VCO. 4 VREF1 O Charge pump output 5 VREF O PLL regulator filter 6 VDDA - +5V supply voltage for PLL part 7 CONT_CAP - Contrast control for AMP part 8 ABL - Auto beam limit. 9 GND3 - Ground for video AMP part(for AMP control) 10 CLP_IN - Video clamp pulse input 11 VCC3 - +12V supply voltage for video AMP part(for AMP control) 12 RIN I Video signal input (red) 13 VCC1 - +12V supply voltage for video AMP(for main video signal process) 14 GIN I Video signal input (green) 15 GND1 - Ground for video AMP part(for main video signal process) 16 BIN I Video signal input (blue) 17 BCLP - B output clamp cap 18 BOUT O Video signal output (blue) 19 GND2 - Ground for video AMP part(for video output drive) 20 GCLP - G output clamp cap 21 GOUT O Video signal output (green) 22 VCC2 - +12V supply voltage for video AMP part(for video output drive) 23 RCLP - R output clamp cap 24 ROUT O Video signal output (red) 25 BCT - B cut-off output 26 GCT - G cut-off output 27 RCT - R cut-off output 28 VSS - Ground for digital part 29 SCL I Serial clock (I2C) 30 SDA I/O Serial data (I2C) 31 VDD - +5V supply voltage for digital part 32 HFLB I Horizontal flyback signal |
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