RV5C387A

PRELIMINARY

12345

- 16 -

F6 to F0 bits

The Oscillation Adjustment Circuit is configured to change time counts of 1 second on the basis of the settings

of

the Oscillation Adjustment Register when the second digits read 00, 20, or 40 seconds.

Normally, the Second

Counter is incremented once per 32768 32.768-kHz clock pulses generated by the crystal oscillator.

Writing to

the F6 to F0 bits activates the oscillation adjustment circuit.

*

The Oscillation Adjustment Circuit will not operate with the same

timing (00, 20, or 40 seconds)

as the timing of writing to the Oscillation Adjustment Register.

*

The F6 bit setting of 0 causes an increment of time counts by ((F5, F4, F3, F2, F1, F0) - 1) x 2.

The F6 bit setting of 1 causes a decrement of time counts by ((/F5, /F4, /F3, /F2, /F1, /F0) + 1) x 2.

The settings of "*, 0, 0, 0, 0, 0, *" ("*" representing either "0" or "1") in the F6, F5, F4, F3, F2, F1, and F0

bits cause neither an increment nor decrement of time counts.

Example:

When the second digits read 00, 20, or 40, the settings of "0, 0, 0, 0, 1, 1, 1" in the F6, F5, F4, F3, F2, F1, and F0

bits cause an increment of the current time counts of 32768 by (7 - 1) x 2 to 32780 (a current time count loss).

When the second digits read 00, 20, or 40, the settings of "0, 0, 0, 0, 0, 0, 1" in the F6, F5, F4, F3, F2, F1, and F0

bits cause neither an increment nor a decrement of the current time counts of 32768.

When the second digits read 00, 20, or 40, the settings of "1, 1, 1, 1, 1, 1, 0" in the F6, F5, F4, F3, F2, F1, and F0

bits cause a decrement of the current time counts of 32768 by (- 2) x 2 to 32764 (a current time count gain).

An increase of two clock pulses once per 20 seconds causes a time count loss of approximately 3 ppm (2 / (32768

x 20 = 3.051 ppm).

Conversely, a decrease of two clock pulses once per 20 seconds causes a time count gain of

3 ppm.

Consequently, deviations in time counts can be corrected with a precision of

±1.5 ppm. Note that the

oscillation adjustment circuit is configured to correct deviations in time counts and not the oscillation frequency of

the 32.768-kHz clock pulses.

For further details, see "14. 2. 4.

Oscillation Adjustment Circuit".

13.2.7.

Alarm_W Registers (Address 8-Ah)

•

Alarm_W Minute Register (Address 8h)

D7

D6

D5

D4

D3

D2

D1

D0

-

WM40

WM20

WM10

WM8

WM4

WM2

WM1

(For Writing)

0

WM40

WM20

WM10

WM8

WM4

WM2

WM1

(For Reading)

0

Indefinite

Indefinite

Indefinite

Indefinite

Indefinite

Indefinite

Indefinite

Default Settings *)

•

Alarm_W Hour Register (Address 9h)

D7

D6

D5

D4

D3

D2

D1

D0

-

-

WH20

WP

⋅/A

WH10

WH8

WH4

WH2

WH1

(For Writing)

0

0

WH20

WP

⋅/A

WH10

WH8

WH4

WH2

WH1

(For Reading)

0

0

Indefinite

Indefinite

Indefinite

Indefinite

Indefinite

Indefinite

Default Settings *)

•

Alarm_W Day-of-week Register (Address Ah)

D7

D6

D5

D4

D3

D2

D1

D0

-

WW6

WW5

WW4

WW3

WW2

WW1

WW0

(For Writing)

0

WW6

WW5

WW4

WW3

WW2

WW1

WW0

(For Reading)

0

Indefinite

Indefinite

Indefinite

Indefinite

Indefinite

Indefinite

Indefinite

Default Settings *)

*)

Default settings:

Default value means read/written values when the XSTP bit is set to “1” due to power-on

from 0 volts or supply voltage drop.

*

The D5 bit of the Alarm_W Hour Register represents WP/A when the 12-hour mode is selected (0 for a.m. and

1 for p.m.)

*

The Alarm_W Registers should not have any non-existent alarm time settings.