SN74AVCH32T245

32BIT DUALSUPPLY BUS TRANSCEIVER

WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3STATE OUTPUTS

SCES589B − AUGUST 2004 − REVISED APRIL 2005

15

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

VOH

VOL

From Output

Under Test

CL

(see Note A)

LOAD CIRCUIT

S1

2

× VCCO

Open

GND

RL

RL

tPLH

tPHL

Output

Control

(low-level

enabling)

Output

Waveform 1

S1 at 2

× VCCO

(see Note B)

Output

Waveform 2

S1 at GND

(see Note B)

tPZL

tPZH

tPLZ

tPHZ

VCCA/2

VCCA/2

VCCI/2

VCCI/2

VCCI

0 V

VCCO/2

VCCO/2

VOH

VOL

0 V

VCCO/2

VOL + VTP

VCCO/2

VOH − VTP

0 V

VCCI

0 V

VCCI/2

VCCI/2

tw

Input

VCCA

VCCO

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VOLTAGE WAVEFORMS

PULSE DURATION

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

Output

Input

tpd

tPLZ/tPZL

tPHZ/tPZH

Open

2

× VCCO

GND

TEST

S1

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.

C. All input pulses are supplied by generators having the following characteristics: PRR

v10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns.

D. The outputs are measured one at a time, with one transition per measurement.

E. tPLZ and tPHZ are the same as tdis.

F. tPZL and tPZH are the same as ten.

G. tPLH and tPHL are the same as tpd.

H. VCCI is the VCC associated with the input port.

I. VCCO is the VCC associated with the output port.

1.2 V

1.5 V

± 0.1 V

1.8 V

± 0.15 V

2.5 V

± 0.2 V

3.3 V

± 0.3 V

2 k

Ω

2 k

Ω

2 k

Ω

2 k

Ω

2 k

Ω

VCCO

RL

0.1 V

0.1 V

0.15 V

0.15 V

0.3 V

VTP

CL

15 pF

15 pF

15 pF

15 pF

15 pF

Figure 11. Load Circuit and Voltage Waveforms