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LT6700HVHS6-3-TRMPBF Datasheet(PDF) 16 Page - Linear Technology |
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LT6700HVHS6-3-TRMPBF Datasheet(HTML) 16 Page - Linear Technology |
16 / 20 page ![]() LT6700/LT6700HV 6700123fg applicaTions inForMaTion Figure 3. Isolated PWM or ∆∑ Converter LT6700-1 VS 10k GND +INA –INB OUTB OUTA 100k* 100k* 0.22µF†† + – 412k* 10k** 470Ω Lithium COIN CELL 10k 10k 750Ω 10k 750** † 3V/5V 3V/5V ΔΣ SAMPLE IN MOC-207 MOC-207** PWM OUT (OR ΔΣ SENSE) 2 1 5 6 5 6 2 1 0.1µF 0.1µF 3V NOM (IS < 3mA) 5 • VREF = 2V 6700123 F03 22µF 1% METAL FILM DELETE FOR PWM MODE CONNECT FOR PWM MODE OPTIMIZED FOR 2kHz ΔΣ SAMPLING, fPWM(MAX) ≈ 0.6kHz * ** † †† 309k* NC7S14 309k* VIN 0V TO 2V + Figure 2. Micropower Thermostat/Temperature Alarm LT6700-1 VS 10k GND +INA –INB OUTB OUTA 499k RTH T RTH = 1M (e.g., YSI 44015, 1.00MΩ AT 25°C) RSET = RTH AT TSET *RESISTANCE MAY REQUIRE OPTIMIZATION FOR OPERATION OVER INTENDED RTH AND VSUPPLY RANGES HYSTERESIS ZONE ≈0.4°C RSET 2 • VREF 499k 220k 220k* 3.3µF 3.3µF 1.4V TO 18V (IS ≈ 10µA) 0.1µF T < TSET 6700123 F02 charges and discharges in a shallow, controlled fashion. The multiplied reference signal also contains ripple that is the hysteresis multiplied by the same factor, so additional filtering is performed at the sense node of the bridge to prevent comparator chatter in the section A comparator, which is performing the actual conditional decision for the circuit. Instrumentation Grade Pulse Width Modulator (PWM) Comparators with hysteresis are frequently employed to make simple oscillator structures, and the LT6700/ LT6700HVlendsitselfnicelytoformingacharge-balancing PWM function. The circuit shown in Figure 3 forms a PWM that is intended to transmit an isolated representation of a voltage difference, rather like an isolated instrumentation amplifier. The section B comparator is used to generate a 2VreferencesupplylevelfortheCMOSNOTgate(inverter), whichservesastheprecisionswitchelementforthecharge balancer. The heart of the charge balancer is the section A comparator, which is detecting slight charge or discharge states on the 0.22µF “integration” capacitor as it remains balanced at ≈400mV by feedback through the NOT gate. The input sense voltage, VIN, is converted to an imbal- ance current that the NOT gate duty cycle is continually correcting for, thus the digital waveform at the section A comparator output is a PWM representation of VIN with respect to the 2V “full scale.” In this particular circuit, the PWMinformationdrivestheLEDofanopto-coupler,allow- ing the VIN information to be coupled across a dielectric barrier. As an additional option to the circuit, the feedback loopcanbebrokenandasecondopto-coupleremployedto provide the charge balance management. This configura- tion allows for clocking the comparator output (externally to this circuit) and providing synchronous feedback such that a simple Δ∑ voltage-to-frequency conversion can be formedifdesired.Approximately11-bitaccuracyandnoise performance was observed in a one second integration period for duty factors from 1% to 99%. |
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