R5F21354DNFP datasheet(12/46 Pages) RENESAS

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R5F21354DNFP Datasheet(PDF) 12 Page - Renesas Technology Corp

Part #	R5F21354DNFP

Description	RENESAS MCU

Download	46 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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12 / 46 page

R8C/35D Group

2. Central Processing Unit (CPU)

REJ03B0286-0100 Rev.1.00

Page 12 of 43

Mar 26, 2010

2.8.7

Interrupt Enable Flag (I)

The I flag enables maskable interrupts.

Interrupts are disabled when the I flag is set to 0, and are enabled when the I flag is set to 1. The I flag is set to 0

when an interrupt request is acknowledged.

2.8.8

Stack Pointer Select Flag (U)

ISP is selected when the U flag is set to 0; USP is selected when the U flag is set to 1.

The U flag is set to 0 when a hardware interrupt request is acknowledged or the INT instruction of software

interrupt numbers 0 to 31 is executed.

2.8.9

Processor Interrupt Priority Level (IPL)

IPL is 3 bits wide and assigns processor interrupt priority levels from level 0 to level 7.

If a requested interrupt has higher priority than IPL, the interrupt is enabled.

2.8.10

Reserved Bit

If necessary, set to 0. When read, the content is undefined.

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