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SC16IS752 Datasheet(PDF) 5 Page - NXP Semiconductors |
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SC16IS752 Datasheet(HTML) 5 Page - NXP Semiconductors |
5 / 59 page SC16IS752_SC16IS762_7 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 07 — 19 May 2008 5 of 59 NXP Semiconductors SC16IS752/SC16IS762 Dual UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR 6. Pinning information 6.1 Pinning a. I2C-bus interface b. SPI interface Fig 2. Pin configuration for TSSOP28 SC16IS752IPW SC16IS762IPW RTSA CTSA GPIO7/RIA TXA GPIO6/CDA RXA GPIO5/DTRA RESET GPIO4/DSRA XTAL1 RXB XTAL2 TXB VDD VSS I2C GPIO3/RIB A0 GPIO2/CDB A1 GPIO1/DTRB n.c. GPIO0/DSRB SCL RTSB SDA CTSB 002aab657 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 18 17 20 19 22 21 24 23 26 25 28 27 IRQ SC16IS752IPW SC16IS762IPW RTSA CTSA GPIO7/RIA TXA GPIO6/CDA RXA GPIO5/DTRA RESET GPIO4/DSRA XTAL1 RXB XTAL2 TXB VDD VSS SPI GPIO3/RIB CS GPIO2/CDB SI GPIO1/DTRB SO GPIO0/DSRB SCLK RTSB VSS CTSB 002aab599 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 18 17 20 19 22 21 24 23 26 25 28 27 IRQ a. I2C-bus interface b. SPI interface Fig 3. Pin configuration for HVQFN32 002aab658 SC16IS752IBS SC16IS762IBS Transparent top view GPIO0/DSRB A0 A1 GPIO1/DTRB I2C GPIO2/CDB VDD GPIO3/RIB XTAL2 VSS XTAL1 TXB RESET RXB RXA GPIO4/DSRA 8 17 7 18 6 19 5 20 4 21 3 22 2 23 1 24 terminal 1 index area 002aab208 SC16IS752IBS SC16IS762IBS Transparent top view GPIO0/DSRB CS SI GPIO1/DTRB SPI GPIO2/CDB VDD GPIO3/RIB XTAL2 VSS XTAL1 TXB RESET RXB RXA GPIO4/DSRA 8 17 7 18 6 19 5 20 4 21 3 22 2 23 1 24 terminal 1 index area |
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