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SC16IS752 Datasheet(PDF) 19 Page - NXP Semiconductors

Part # SC16IS752
Description  Dual UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

SC16IS752 Datasheet(HTML) 19 Page - NXP Semiconductors

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SC16IS752_SC16IS762_7
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 07 — 19 May 2008
19 of 59
NXP Semiconductors
SC16IS752/SC16IS762
Dual UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
8.
Register descriptions
The programming combinations for register selection are shown in Table 9.
[1]
MCR[7] can only be modified when EFR[4] is set.
[2]
Accessible only when ERF[4] = 1 and MCR[2] = 1, that is, EFR[4] and MCR[2] are read/write enables.
[3]
Accessible only when LCR[7] is logic 1.
[4]
Accessible only when LCR is set to 1011 1111b (0xBF).
Table 9.
Register map - read/write properties
Register name Read mode
Write mode
RHR/THR
Receive Holding Register (RHR)
Transmit Holding Register (THR)
IER
Interrupt Enable Register (IER)
Interrupt Enable Register
IIR/FCR
Interrupt Identification Register (IIR)
FIFO Control Register (FCR)
LCR
Line Control Register (LCR)
Line Control Register
MCR
Modem Control Register (MCR)[1]
Modem Control Register[1]
LSR
Line Status Register (LSR)
n/a
MSR
Modem Status Register (MSR)
n/a
SPR
Scratchpad Register (SPR)
Scratchpad Register
TCR
Transmission Control Register (TCR)[2]
Transmission Control Register[2]
TLR
Trigger Level Register (TLR)[2]
Trigger Level Register[2]
TXLVL
Transmit FIFO Level register
n/a
RXLVL
Receive FIFO Level register
n/a
IODir
I/O pin Direction register
I/O pin Direction register
IOState
I/O pins State register
n/a
IOIntEna
I/O Interrupt Enable register
Interrupt Enable register
IOControl
I/O pins Control register
I/O pins Control register
EFCR
Extra Features Control Register
Extra Features Control Register
DLL
Divisor Latch LSB (DLL)[3]
Divisor Latch LSB[3]
DLH
Divisor Latch MSB (DLH)[3]
Divisor Latch MSB[3]
EFR
Enhanced Features Register (EFR)[4]
Enhanced Features Register[4]
XON1
Xon1 word[4]
Xon1 word[4]
XON2
Xon2 word[4]
Xon2 word[4]
XOFF1
Xoff1 word[4]
Xoff1 word[4]
XOFF2
Xoff2 word[4]
Xoff2 word[4]


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