ML483

0.7 – 1.0 GHz High IP3 Mixer with Integrated LO Amp

Data Sheet: Rev C 03/23/10

- 6 of 8 -

© 2010 TriQuint Semiconductor, Inc.

Pin Description

Pin

Symbol

Description

1

LO

Local Oscillator (LO) Input. Internally matched to 50

. Internally DC blocked. External

blocking not required.

2

GND

Ground

3

GND

Ground

4

Vcc

Positive Supply Voltage. Requires capacitive decoupling at pin.

5

IF

Intermediate Frequency (IF) Output. Internally matched to 50

. No Internal DC blocking.

External blocking cap required if DC present.

6

GND

Ground

7

GND

Ground

8

RF

RF Input. Internally matched to 50

. No Internal DC blocking. External blocking cap

required if DC present.

Backside Paddle

Ground

Applications Information

PC Board Layout

thick) for mechanical rigidity.

Metal layers are 1-oz

copper. Microstrip line details: width = .026”, spacing =

.026”.

The ML483 application board is easy to use requiring only

1 external decoupling cap. This cap should be placed as

close as possible to Vcc pin 4. All three ports use 50

microstrip. There are 5 grounding vias that are not shown.

The backside paddle requires these 5 vias for good RF

grounding. The mechanical configuration diagram on the

next page illustrates proper placement of these vias.

The pad pattern shown has been developed and tested for

optimized assembly at TriQuint Semiconductor. The PCB

land pattern has been developed to accommodate lead and

package tolerances. Since surface mount processes vary

from company to company, careful process development

is recommended.

For

further

technical

information,

Refer

to

www.TriQuint.com

1

2

3

4

8

7

6

5

RF

IF

GND

LO

GND

GND

Vcc

GND