CDCE62005 datasheet(31/80 Pages) TI

Part #	CDCE62005

Description	Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs

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Manufacturer	TI [Texas Instruments]

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CDCE62005

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SCAS862C – NOVEMBER 2008 – REVISED FEBRUARY 2010

Device Registers: Register 4

Table 10. CDCE62005 Register 4 Bit Definitions

SPI

RAM

BIT NAME

BIT

BLOCK

0

A0

Address 0

0

1

A1

Address 1

0

2

A2

Address 2

1

3

A3

Address 3

0

4

0

RESERVED

—

This bit must be set to a “1”

EEPROM

0 (default): normal operation,

5

1

ATETEST

TI Test Bit

1: outputs have deterministic delay relative to low-to-high pulse of SYNC pin when the

EEPROM

SYNC signal is synchronized with the reference input

6

2

RESERVED

Used in Test Mode

EEPROM

7

3

RESERVED

Used in Test Mode

EEPROM

8

4

OUTMUX4SELX

Output 4

OUTPUT MUX “4” Select. Selects the Signal driving Output Divider”4”

EEPROM

(X,Y) = 00: PRI_IN, 01:SEC_IN, 10:SMART_MUX, 11:VCO_CORE

9

5

OUTMUX4SELY

Output 4

EEPROM

10

6

PH4ADJC0

Output 4

EEPROM

11

7

PH4ADJC1

Output 4

EEPROM

12

8

PH4ADJC2

Output 4

EEPROM

13

9

PH4ADJC3

Output 4

Coarse phase adjust select for output divider “4”

EEPROM

14

10

PH4ADJC4

Output 4

EEPROM

15

11

PH4ADJC5

Output 4

EEPROM

16

12

PH4ADJC6

Output 4

EEPROM

17

13

OUT4DIVRSEL0

Output 4

EEPROM

18

14

OUT4DIVRSEL1

Output 4

EEPROM

19

15

OUT4DIVRSEL2

Output 4

EEPROM

20

16

OUT4DIVRSEL3

Output 4

OUTPUT DIVIDER “4” Ratio Select

EEPROM

21

17

OUT4DIVRSEL4

Output 4

EEPROM

22

18

OUT4DIVRSEL5

Output 4

EEPROM

23

19

OUT4DIVRSEL6

Output 4

EEPROM

When set to “0”, the divider is disabled

24

20

OUT4DIVSEL

Output 4

EEPROM

When set to “1”, the divider is enabled

High Swing LVPECL When set to “1” and Normal Swing when set to “0”

– If LVCMOS or LVDS is selected the Output swing will stay at the same level.

25

21

HiSWINGLVPEC4

Output 4

EEPROM

– If LVPECL buffer is selected the Output Swing will be 30% higher if this bit is set to “1”

and Normal LVPECL if it is set to “0”.

26

22

CMOSMODE4PX

Output 4

LVCMOS mode select for OUTPUT “4” Positive Pin.

EEPROM

(X,Y)=00:Active, 10:Inverting, 11:Low, 01:3-State

27

23

CMOSMODE4PY

Output 4

EEPROM

28

24

CMOSMODE4NX

Output 4

LVCMOS mode select for OUTPUT “3” Negative Pin.

EEPROM

(X,Y)=00:Active, 10:Inverting, 11:Low, 01:3-State

29

25

CMOSMODE4NY

Output 4

EEPROM

30

26

OUTBUFSEL4X

Output 4

OUTPUT TYPE

RAM BITS

EEPROM

22

23

24

25

26

27

LVPECL

0

1

LVDS

0

1

0

1

31

27

OUTBUFSEL4Y

Output 4

EEPROM

LVCMOS

See Settings Above*

0

Output Disabled

0

1

0

1

0

* Use Description for Bits 22,23,24 and 25 for setting the LVCMOS Outputs

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