CDCE62005 datasheet(29/80 Pages) TI

Part #	CDCE62005

Description	Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs

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Manufacturer	TI [Texas Instruments]

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CDCE62005

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SCAS862C – NOVEMBER 2008 – REVISED FEBRUARY 2010

Device Registers: Register 2

Table 8. CDCE62005 Register 2 Bit Definitions

SPI

RA

BIT NAME

BIT

M

BLOCK

BIT

0

A0

Address 0

0

1

A1

Address 1

1

2

A2

Address 2

0

3

A3

Address 3

0

4

0

REFDIV0

Reference Divider Bit “0”

EEPROM

Reference

Divider

5

1

REFDIV1

Reference Divider Bit “1”

EEPROM

6

2

RESERVED

Used in Test Mode

EEPROM

7

3

RESERVED

Used in Test Mode

EEPROM

8

4

OUTMUX2SELX

Output 2

OUTPUT MUX “2” Select. Selects the Signal driving Output Divider”2”

EEPROM

(X,Y) = 00: PRI_IN, 01:SEC_IN, 10:SMART_MUX, 11:VCO_CORE

9

5

OUTMUX2SELY

Output 2

EEPROM

10

6

PH2ADJC0

Output 2

EEPROM

11

7

PH2ADJC1

Output 2

EEPROM

12

8

PH2ADJC2

Output 2

EEPROM

13

9

PH2ADJC3

Output 2

Coarse phase adjust select for output divider “2”

EEPROM

14

10

PH2ADJC4

Output 2

EEPROM

15

11

PH2ADJC5

Output 2

EEPROM

16

12

PH2ADJC6

Output 2

EEPROM

17

13

OUT2DIVRSEL0

Output 2

EEPROM

18

14

OUT2DIVRSEL1

Output 2

EEPROM

19

15

OUT2DIVRSEL2

Output 2

EEPROM

20

16

OUT2DIVRSEL3

Output 2

OUTPUT DIVIDER “2” Ratio Select

EEPROM

21

17

OUT2DIVRSEL4

Output 2

EEPROM

22

18

OUT2DIVRSEL5

Output 2

EEPROM

23

19

OUT2DIVRSEL6

Output 2

EEPROM

When set to “0”, the divider is disabled

24

20

OUT2DIVSEL

Output 2

EEPROM

When set to “1”, the divider is enabled

High Swing LVPECL When set to “1” and Normal Swing when set to “0”

– If LVCMOS or LVDS is selected the Output swing will stay at the same level.

25

21

HiSWINGLVPEC2

Output 2

EEPROM

– If LVPECL buffer is selected the Output Swing will be 30% higher if this bit is set to “1”

and Normal LVPECL if it is set to “0”.

26

22

CMOSMODE2PX

Output 2

LVCMOS mode select for OUTPUT “2” Positive Pin.

EEPROM

(X,Y)=00:Active, 10:Inverting, 11:Low, 01:3-State

27

23

CMOSMODE2PY

Output 2

EEPROM

28

24

CMOSMODE2NX

Output 2

LVCMOS mode select for OUTPUT “2” Negative Pin.

EEPROM

(X,Y)=00:Active, 10:Inverting, 11:Low, 01:3-State

29

25

CMOSMODE2NY

Output 2

EEPROM

30

26

OUTBUFSEL2X

Output 2

OUTPUT TYPE

RAM BITS

EEPROM

22

23

24

25

26

27

LVPECL

0

1

LVDS

0

1

0

1

31

27

OUTBUFSEL2Y

Output 2

EEPROM

LVCMOS

See Settings Above*

0

Output Disabled

0

1

0

1

0

* Use Description for Bits 22,23,24 and 25 for setting the LVCMOS Outputs

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