CDCE62005 datasheet(27/80 Pages) TI

Part #	CDCE62005

Description	Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs

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Manufacturer	TI [Texas Instruments]

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CDCE62005

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SCAS862C – NOVEMBER 2008 – REVISED FEBRUARY 2010

Device Registers: Register 0

Table 6. CDCE62005 Register 0 Bit Definitions

SPI

RAM

BIT NAME

BIT

BLOCK

0

A0

Address 0

0

1

A1

Address 1

0

2

A2

Address 2

0

3

A3

Address 3

0

4

0

DIV2PRIX

Pre-Divider Selection for the Primary Reference

EEPROM

Primary

(X,Y)=00:3-state, 01:Divide by “1”, 10:Divide by “2”, 11:Reserved

Reference

5

1

DIV2PRIY

EEPROM

6

2

RESERVED

Used in Test Mode

EEPROM

7

3

RESERVED

Used in Test Mode

EEPROM

8

4

OUTMUX0SELX

Output 0

OUTPUT MUX “0” Select. Selects the Signal driving Output Divider”0”

EEPROM

(X,Y) = 00: PRI_IN, 01:SEC_IN, 10:SMART_MUX, 11:VCO_CORE

9

5

OUTMUX0SELY

Output 0

EEPROM

10

6

PH0ADJC0

Output 0

EEPROM

11

7

PH0ADJC1

Output 0

EEPROM

12

8

PH0ADJC2

Output 0

EEPROM

13

9

PH0ADJC3

Output 0

Coarse phase adjust select for output divider “0”

EEPROM

14

10

PH0ADJC4

Output 0

EEPROM

15

11

PH0ADJC5

Output 0

EEPROM

16

12

PH0ADJC6

Output 0

EEPROM

17

13

OUT0DIVRSEL0

Output 0

EEPROM

18

14

OUT0DIVRSEL1

Output 0

EEPROM

19

15

OUT0DIVRSEL2

Output 0

EEPROM

20

16

OUT0DIVRSEL3

Output 0

OUTPUT DIVIDER “0” Ratio Select

EEPROM

21

17

OUT0DIVRSEL4

Output 0

EEPROM

22

18

OUT0DIVRSEL5

Output 0

EEPROM

23

19

OUT0DIVRSEL6

Output 0

EEPROM

When set to “0”, the divider is disabled

24

20

OUT0DIVSEL

Output 0

EEPROM

When set to “1”, the divider is enabled

High Swing LVPECL When set to “1” and Normal Swing when set to “0”

– If LVCMOS or LVDS is selected the Output swing will stay at the same level.

25

21

HiSWINGLVPECL0

Output 0

EEPROM

– If LVPECL buffer is selected the Output Swing will be 30% higher if this bit is set to “1”

and Normal LVPECL if it is set to “0”.

26

22

CMOSMODE0PX

Output 0

LVCMOS mode select for OUTPUT “0” Positive Pin.

EEPROM

(X,Y)=00:Active, 10:Inverting, 11:Low, 01:3-State

27

23

CMOSMODE0PY

Output 0

EEPROM

28

24

CMOSMODE0NX

Output 0

LVCMOS mode select for OUTPUT “0” Negative Pin.

EEPROM

(X,Y)=00:Active, 10:Inverting, 11:Low, 01:3-State

29

25

CMOSMODE0NY

Output 0

EEPROM

30

26

OUTBUFSEL0X

Output 0

OUTPUT TYPE

RAM BITS

EEPROM

22

23

24

25

26

27

LVPECL

0

1

LVDS

0

1

0

1

31

27

OUTBUFSEL0Y

Output 0

EEPROM

LVCMOS

See Settings Above*

0

Output Disabled

0

1

0

1

0

* Use Description for Bits 22,23,24 and 25 for setting the LVCMOS Outputs

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