 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
CDCE62005 Datasheet(PDF) 26 Page - Texas Instruments |
|
|
||||||||||||||||||||||||||||||
CDCE62005 Datasheet(HTML) 26 Page - Texas Instruments |
|
|
26 / 80 page  SPI_CLK Bit0 Bit1 Bit29 Bit30 Bit31 SPI_LE SPI_MOSI SPI_ CLK SPI_ MOSI SPI_ MISO SPI_LE Bit Bit0 Bit1 Bit2 Bit 30 31 CDCE62005 SCAS862C – NOVEMBER 2008 – REVISED FEBRUARY 2010 www.ti.com Writing to the CDCE62005 Figure 20 illustrates a Write to RAM operation. Notice that the latching of the first data bit in the data stream (Bit 0) occurs on the first rising edge of SPI_CLK after SPI_LE transitions from a high to a low. For the CDCE62005, data transitions occur on the falling edge of SPI_CLK. A rising edge on SPI_LE signals to the CDCE62005 that the transmission of the last bit in the stream (Bit 31) has occurred. Figure 20. CDCE62005 SPI Write Operation Reading from the CDCE62005 Figure 21 shows how the CDCE62005 executes a Read Command. The SPI master first issues a Read Command to initiate a data transfer from the CDCE62005 back to the host (see Table 6). This command specifies the address of the register of interest. By transitioning SPI_LE from a low to a high, the CDCE62005 resolves the address specified in the appropriate bits of the data field. The host drives SPI_LE low and the CDCE62005 presents the data present in the register specified in the Read Command on SPI_MISO. Figure 21. CDCE62005 Read Operation Writing to EEPROM After the CDCE62005 detects a power-up and completes a reset cycle, it copies the contents of the on-board EEPROM into the Device Registers. Therefore, the CDCE62005 initializes into a known state pre-defined by the user. The host issues one of two special commands shown in Table 6 to copy the contents of Device Registers 0 through 7 (a total of 184 bits) into EERPOM. They include: • Copy RAM to EEPROM – Unlock, Execution of this command can happen many times. • Copy RAM to EEPROM – Lock: Execution of this command can happen only once; after which the EEPROM is permanently locked. After either command is initiated, power must remain stable and the host must not access the CDCE62005 for at least 50 ms to allow the EEPROM to complete the write cycle and to avoid the possibility of EEPROM corruption. 26 Submit Documentation Feedback Copyright © 2008–2010, Texas Instruments Incorporated Product Folder Link(s) :CDCE62005 |
Similar Part No. - CDCE62005 |
|
Similar Description - CDCE62005 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
