CDCE62005 datasheet(21/80 Pages) TI

Part #	CDCE62005

Description	Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs

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Manufacturer	TI [Texas Instruments]

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SPI _ CLK

Bit0

Bit1

Bit29

Bit30

Bit31

SPI _ LE

SPI _ MOSI

t

4

t

5

t

2

t

3

t

7

t

6

t

1

SPI _ CLK

SPI _ MOSI

SPI _ MISO

SPI _ LE

Bit30

Bit31

Bit0

Bit1

Bit2

t

4

t

5

t

2

t

3

t

7

t

6

t

8

t

9

CDCE62005

www.ti.com

SCAS862C – NOVEMBER 2008 – REVISED FEBRUARY 2010

SPI CONTROL INTERFACE TIMING

Figure 14. Timing Diagram for SPI Write Command

Figure 15. Timing Diagram for SPI Read Command

Table 4. SPI Bus Timing Characteristics

PARAMETER

MIN

TYP

MAX

UNIT

fClock

Clock Frequency for the SPI_CLK

20

MHz

t1

SPI_LE to SPI_CLK setup time

10

ns

t2

SPI_MOSI to SPI_CLK setup time

10

ns

t3

SPI_MOSI to SPI_CLK hold time

10

ns

t4

SPI_CLK high duration

25

ns

t5

SPI_CLK low duration

25

ns

t6

SPI_CLK to SPI_LE Setup time

10

ns

t7

SPI_LE Pulse Width

20

ns

t8

SPI_MISO to SPI_CLK Data Valid (First Valid Bit after LE)

10

ns

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