CDCE62005 datasheet(18/80 Pages) TI

Part #	CDCE62005

Description	Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs

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Manufacturer	TI [Texas Instruments]

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CDCE62005

SCAS862C – NOVEMBER 2008 – REVISED FEBRUARY 2010

www.ti.com

TIMING REQUIREMENTS

over recommended ranges of supply voltage, load and operating free air temperature (unless otherwise noted)

PARAMETER

MIN

TYP

MAX

UNIT

PRI_IN/SEC_IN_IN REQUIREMENTS

Maximum Clock Frequency Applied to PRI_IN & SEC_IN in fan-out mode

1500

MHz

Maximum Clock Frequency Applied to Smart Multiplexer input Divider

500

MHz

fmax

Maximum Clock Frequency Applied to Reference Divider

250

MHz

For Single ended Inputs ( LVCMOS) on PRI_IN and SEC_IN

250

MHz

Single duty cycle of PRI_IN or SEC_IN at VCC / 2

40%

60%

Differential duty cycle of PRI_IN or SEC_IN at VCC / 2

40%

60%

AUXILARY_IN REQUIREMENTS

fREF

Crystal single ended Inputs (AT-Cut Crystal Input)

2

42

MHz

PD, SYNC, REF_SEL REQUIREMENTS

tr/ tf

Rise and fall time of the PD, SYNC, REF_SEL signal from 20% to 80% of VCC

4

ns

18

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