CDCE62005 datasheet(15/80 Pages) TI

Part #	CDCE62005

Description	Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs

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Manufacturer	TI [Texas Instruments]

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LVDSDC Termination Test

Oscilloscope

100

CDCE62005

www.ti.com

SCAS862C – NOVEMBER 2008 – REVISED FEBRUARY 2010

ELECTRICAL CHARACTERISTICS OPERATING CONDITIONS (Continued)

(1) (2) (3) (4)

recommended operating conditions for the CDCE62005 device for under the specified Industrial temperature range of –40°C

to 85°C

PARAMETER

TEST CONDITIONS

MIN TYP(5)

MAX

UNIT

LVDS OUTPUT

fclk

Output frequency

Configuration Load

0

800

MHz

|VOD|

Differential output voltage

RL = 100 Ω

270

550

mV

ΔVOD

LVDS VOD magnitude change

50

mV

VOS

Offset Voltage

–40°C to 85°C

1.24

V

ΔVOS

VOS magnitude change

40

mV

Short circuit Vout+ to ground

VOUT = 0

27

mA

Short circuit Vout– to ground

VOUT = 0

27

mA

tpho

Reference (PRI_IN or SEC_IN) to output

Outputs are set to 491.52 MHz

1.65

ns

phase offset

Reference at 30.72 MHz

tpd(LH)/tpd(HL) Propagation delay from PRI_IN or SEC_IN to

Crosspoint to Crosspoint, load In Bypass

3.1

ns

outputs

Mode

All Outputs set at 200 MHz

tsk(o)

(6)

Skew, output to output For Y0 to Y4

In Bypass Mode Only

25

ps

Reference = 200 MHz

CO

Output capacitance on Y0 to Y4

VCC = 3.3 V; VO = 0 V or VCC

5

pF

IOPDH

Power down output current

VO = VCC

25

mA

IOPDL

Power down output current

VO = 0 V

5

mA

Duty cycle

45%

55%

tr / tf

Rise and fall time

20% to 80% of VOUT(PP)

110

160

190

ps

LVCMOS-TO-LVDS

tskP_c

Output skew between LVCMOS and LVDS

VCC/2 to Crosspoint

0.9

1.4

1.9

ns

outputs(7)

(1)

This is valid only for same REF_IN clock and Y output clock frequency

(2)

VINPP minimum and maximum is required to maintain ac specifications; the actual device function tolerates at a minimum VINPP of

100mV.

(3)

Lock output has a 80 k

Ω pull-down resistor.

(4)

The phase of LVCMOS is lagging in reference to the phase of LVDS.

(5)

All typical values are at VCC = 3.3 V, temperature = 25°C

(6)

The tsk(o) specification is only valid for equal loading of all outputs.

(7)

Operating the LVCMOS or LVDS output above the maximum frequency will not cause a malfunction to the device, but the output signal

swing might no longer meet the output specification

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