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CDCE62005 Datasheet(PDF) 65 Page - Texas Instruments |
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CDCE62005 Datasheet(HTML) 65 Page - Texas Instruments |
65 / 80 page 1 = ´ ´ Vout i t C ´ = out V C t i 10 3.3 1.8 1.8 10 164 110 = = \ @ = ´ = @ cc H Out C nF V V V V V n t s 5 pF Locked Unlocked 80k 110 uA 110 uA Vcc PFD/ CP FromInputDivider FromFeedbackDivider C PLL_LOCK ToHost Lock_I CDCE62005 www.ti.com SCAS862C – NOVEMBER 2008 – REVISED FEBRUARY 2010 Analog Lock Detect Figure 38 shows the Analog Lock Detect circuit. Depending upon the phase relationship of the two signals presented at the PFD/CP inputs, the lock detect circuit either charges (if the PLL is locked) or discharges (if PLL is unlocked) the circuit shown via 100mA current sources. An external capacitor determines the sensitivity of the lock detect circuit. The value of the capacitor determines the rate of change of the voltage presented on the output pin PLL_LOCK and hence how quickly the PLL_LOCK output toggles based on a change of PLL locked status. The PLL_LOCK pin is an analog output in analog lock detect mode. (7) Solving for t yields: (8) VH = 0.55 × VCC VL = 0.35 × VCC For Example, let: (9) Figure 38. CDCE62005 Analog Lock Detect Copyright © 2008–2010, Texas Instruments Incorporated Submit Documentation Feedback 65 Product Folder Link(s) :CDCE62005 |
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