CDCE62005 datasheet(46/80 Pages) TI

Part #	CDCE62005

Description	Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs

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Manufacturer	TI [Texas Instruments]

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CDCE62005

SCAS862C – NOVEMBER 2008 – REVISED FEBRUARY 2010

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CDCE62005 Output Divider Settings

OUTPUT DIVIDER n SETTINGSRegister n (n = 0,1,2,3,4)

Output Phase*

Output Divide Ratio

Multiplexer

Integer Divider

Prescaler

Output

Channels

Auxiliary

n.19

n.18

n.17

n.16

n.15

n.14

n.13

n.20

Cycles

Degree

0-4

Output

X

0

OFF

0

1

0

1

–

0

1

OFF

1

0

1

2

–

0.5

180

2**

4

1

0

1

3

–

0

3**

6

1

0

1

0

1

4

–

0.5

180

4

8

1

0

1

5

–

0

5

10

0

1

3

2

21

7560

6

0

1

0

1

4

2

28.5

10260

8

0

1

5

2

35

12500

10

0

1

0

1

3

4

24

8640

12

0

1

0

1

4

32.5

11700

16

0

1

5

4

40

14400

20

0

1

0

1

3

6

27

9720

18

0

1

0

1

0

1

4

6

36.5

13140

24

0

1

0

1

5

6

45

16200

30

0

1

0

1

4

8

40.5

14580

32

0

1

5

8

50

18000

40

0

1

0

1

5

10

55

19800

50

0

1

0

1

0

1

3

12

36

12960

36

0

1

0

1

0

1

4

12

48.5

17460

48

0

1

0

1

5

12

60

21600

60

0

1

0

1

2

14

25.5

9540

28

0

1

0

1

3

14

39

14040

42

0

1

0

1

0

1

4

14

52.5

18900

56

0

1

0

1

5

14

65

23400

70

0

1

0

1

4

16

56.5

20340

64

0

1

5

16

70

25200

80

*These columns show that the output divider generates a unique phase lag in the output clock (relative to the clock from the output multiplexer) determined by the

divide ratio used.

**Output channel 2 or 3 determine the auxiliary output divide ratio. For example, if the auxiliary output is programmed to drive via output 2 and output 2 divider is

programmed to divide by 3, then the divide ratio for the auxiliary output will be 6.

46

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