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CDCE62005 Datasheet(PDF) 38 Page - Texas Instruments |
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CDCE62005 Datasheet(HTML) 38 Page - Texas Instruments |
38 / 80 page /1:/2:HiZ /1:/2:HiZ ReferenceDivider /1 - /8 PRI_IN SEC_IN XTAL / AUX _IN 1500 MHz LVPECL : 1MHz-1500MHz LVDS : 1MHz-800MHz LVCMOS : 250 MHz 1MHz-250MHz Crystal : 2 MHz – 42 MHz Smart MUX 1 Smart MUX2 SmartMUX Control 5 4 3 2 Register 5 REF _SEL 6 1 0 Register 5 1 0 Register 0 1 0 Register 1 8 9 12 Register 6 UniversalInputBuffers SmartMultiplexer AuxiliaryInput 0 1 0 Register 2 Register 3 250MHz 250MHz CDCE62005 SCAS862C – NOVEMBER 2008 – REVISED FEBRUARY 2010 www.ti.com INPUT BLOCK The Input Block includes two Universal Input Buffers, an Auxiliary Input, and a Smart Multiplexer. The Input Block drives three different clock signals onto the Internal Clock Distribution Bus: buffered versions of both the primary and secondary inputs (PRI_IN and SEC_IN) and the output of the Smart Multiplexer. Figure 23. CDCE62005 Input Block With References to Registers 38 Submit Documentation Feedback Copyright © 2008–2010, Texas Instruments Incorporated Product Folder Link(s) :CDCE62005 |
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