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CDCE62005 Datasheet(PDF) 35 Page - Texas Instruments |
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CDCE62005 Datasheet(HTML) 35 Page - Texas Instruments |
35 / 80 page CDCE62005 www.ti.com SCAS862C – NOVEMBER 2008 – REVISED FEBRUARY 2010 Device Registers: Register 8 Table 14. CDCE62005 Register 8 Bit Definitions SPI RAM BIT NAME RELATED DESCRIPTION/FUNCTION BIT BIT BLOCK 0 A0 Address 0 0 1 A1 Address 1 0 2 A2 Address 2 0 3 A3 Address 3 1 4 0 CALWORD0 Status RAM 5 1 CALWORD1 Status RAM 6 2 CALWORD2 Status RAM “VCO Calibration Word” read back from device 7 3 CALWORD3 Status RAM 8 4 CALWORD4 Status RAM 9 5 CALWORD5 Status RAM 10 6 PLLLOCKPIN Status Read Only: Status of the PLL Lock Pin Driven by the device. RAM 11 7 /SLEEP Status Set Device Sleep mode On when set to “0”, Normal Mode when set to “1” RAM If set to “0” this bit forces “/SYNC ; Set to “1” to exit the Synchronization 12 8 /SYNC Status RAM State. 13 9 RESERVED RAM 14 10 VERSION0 Silicon Revision RAM 15 11 VERSION1 Silicon Revision RAM 16 12 VERSION2 Silicon Revision RAM 17 13 RESERVED — Must be set to “0” RAM 18 14 CALWORD_IN0 Diagnostics RAM 19 15 CALWORD_IN1 Diagnostics RAM 20 16 CALWORD_IN2 Diagnostics RAM TI Test Registers. For TI Use Only 21 17 CALWORD_IN3 Diagnostics RAM 22 18 CALWORD_IN4 Diagnostics RAM 23 19 CALWORD_IN5 Diagnostics RAM 24 20 RESERVED — Must be set to “0” RAM 25 21 TITSTCFG0 Diagnostics RAM 26 22 TITSTCFG1 Diagnostics RAM TI Test Registers. For TI Use Only 27 23 TITSTCFG2 Diagnostics RAM 28 24 TITSTCFG3 Diagnostics RAM 29 25 PRIACTIVITY Status Synthesizer Source Indicator (27:25) RAM 0 0 1 Primary Input 30 26 SECACTIVITY Status RAM 0 1 0 Secondary Input 31 27 AUXACTIVITY Status RAM 1 0 0 Auxiliary Input Copyright © 2008–2010, Texas Instruments Incorporated Submit Documentation Feedback 35 Product Folder Link(s) :CDCE62005 |
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