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TPS61165DRVTG4 Datasheet(PDF) 2 Page - Texas Instruments |
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TPS61165DRVTG4 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 26 page TPS61165 SLVS790A – NOVEMBER 2007 – REVISED MAY 2010 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION(1) TA OPEN LED PROTECTION PACKAGE(2) PACKAGE MARKING TPS61165DRV CCQ –40°C to 85°C 38 V (typical) TPS61165DBV DAK (1) For the most current package and ordering information, see the TI Web site at www.ti.com. (2) The DRV package is available in tape and reel. Add R suffix (TPS61165DRVR) to order quantities of 3000 parts per reel or add T suffix (TPS61165DRVT) to order 250 parts per reel. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VALUE UNIT Supply Voltages on VIN (2) –0.3 to 20 V Voltages on CTRL(2) –0.3 to 20 V VI Voltage on FB and COMP(2) –0.3 to 3 V Voltage on SW(2) –0.3 to 40 V PD Continuous Power Dissipation See the Dissipation Ratings Table TJ Operating Junction Temperature Range –40 to 150 °C TSTG Storage Temperature Range –65 to 150 °C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to network ground terminal. DISSIPATION RATINGS DERATING BOARD PACKAGE RqJC RqJA FACTOR ABOVE TA < 25°C TA = 70°C TA = 85°C TA = 25C Low-K DRV (1) 20°C/W 140°C/W 7.1mW/°C 715mW 395mW 285mW High-K DRV (2) 20°C/W 65°C/W 15.4mW/°C 1540mW 845mW 615mW High-K DBV (2) n/a 210°C/W 4.7mW/°C 470mW 258mW 188mW (1) The JEDEC low-K (1s) board used to derive this data was a 3in x 3in, two-layer board with 2-ounce copper traces on top of the board. (2) The JEDEC high-K (2s2p) board used to derive this data was a 3in x 3in, multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on top and bottom of the board. RECOMMENDED OPERATING CONDITIONS MIN TYP MAX UNIT VI Input voltage range, VIN 3 18 V VO Output voltage range VIN 38 V L Inductor(1) 10 22 mH fdim PWM dimming frequency 5 100 kHz CIN Input capacitor 1 mF CO Output capacitor 1 10 mF TA Operating ambient temperature –40 85 °C TJ Operating junction temperature –40 125 °C (1) These values are recommended values that have been successfully tested in several applications. Other values may be acceptable in other applications but should be fully tested by the user. 2 Submit Documentation Feedback Copyright © 2007–2010, Texas Instruments Incorporated Product Folder Link(s): TPS61165 |
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