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TPS61165DRVTG4 Datasheet(PDF) 9 Page - Texas Instruments |
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TPS61165DRVTG4 Datasheet(HTML) 9 Page - Texas Instruments |
9 / 26 page CTRL low high FB 200 mVxdutycycle Insertbattery CTRL low high FB Insertbattery Programming code FBramp Shutdowndelay t EnterESmode Timingwindow Programmingcode 50mV 50mV EnterESmode PWMsignal Startup delay PWM mode Startupdelay FBramp Programmedvalue (ifnotprogrammed, 200mVdefault ) Shutdown delay IC Shutdown Startupdelay FBramp ES mode ESdetectdelay ESdetecttime V FB + Duty 200 mV TPS61165 www.ti.com SLVS790A – NOVEMBER 2007 – REVISED MAY 2010 LED BRIGTHNESS DIMMING MODE SELECTION The CTRL pin is used for the control input for both dimming modes, PWM dimming and the 1 wire dimming. The dimming mode for the TPS61165 is selected each time the device is enabled. The default dimming mode is PWM dimming. To enter 1 wire mode, the following digital pattern on the CTRL pin must be recognized by the IC every time the IC starts from the shutdown mode. 1. Pull CTRL pin high to enable the TPS61165, and to start the 1 wire detection window. 2. After the EasyScale detection delay (tes_delay, 100ms) expires, drive CTRL low for more than the EasyScale detection time (tes_detect, 260ms). 3. The CTRL pin has to be low for more than EasyScale detection time before the EasyScale detection window (tes_win, 1msec) expires. EasyScale detection window starts from the first CTRL pin low to high transition. The IC immediately enters the 1 wire mode once the above 3 conditions are met. the EasyScale communication can start before the detection window expires. Once the dimming mode is programmed, it can not be changed without another start up. This means the IC needs to be shutdown by pulling the CTRL low for 2.5ms and restarts. See the Dimming Mode Detection and Soft Start (see Figure 12) for a graphical explanation. Figure 12. Dimming Mode Detection and Soft Start PWM Brightness Dimming PWM BRIGHTNESS DIMMING When the CTRL pin is constantly high, the FB voltage is regulated to 200mV typically. However, the CTRL pin allows a PWM signal to reduce this regulation voltage; therefore, it achieves LED brightness dimming. The relationship between the duty cycle and FB voltage is given by Equation 2: (2) Where: Duty = duty cycle of the PWM signal 200 mV = internal reference voltage As shown in Figure 13, the IC chops up the internal 200mV reference voltage at the duty cycle of the PWM signal. The pulse signal is then filtered by an internal low pass filter. The output of the filter is connected to the error amplifier as the reference voltage for the FB pin regulation. Therefore, although a PWM signal is used for brightness dimming, only the WLED DC current is modulated, which is often referred as analog dimming. This eliminates the audible noise which often occurs when the LED current is pulsed in replica of the frequency and duty cycle of PWM control. Unlike other scheme which filters the PWM signal for analog dimming, TPS61165 regulation voltage is independent of the PWM logic voltage level which often has large variations. Copyright © 2007–2010, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): TPS61165 |
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