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TPS61165DRVTG4 Datasheet(PDF) 3 Page - Texas Instruments |
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TPS61165DRVTG4 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 26 page  TPS61165 www.ti.com SLVS790A – NOVEMBER 2007 – REVISED MAY 2010 ELECTRICAL CHARACTERISTICS VIN = 3.6 V, CTRL = VIN, TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY CURRENT VI Input voltage range, VIN 3 18 V IQ Operating quiescent current into VIN Device PWM switching no load 2.3 mA ISD Shutdown current CRTL=GND, VIN = 4.2 V 1 mA UVLO Under-voltage lockout threshold VIN falling 2.2 2.5 V Vhys Under-voltage lockout hysterisis 70 mV ENABLE AND REFERENCE CONTROL V(CTRLh) CTRL logic high voltage VIN = 3 V to 18 V 1.2 V V(CTRLl) CTRL logic low voltage VIN = 3 V to 18 V 0.4 V R(CTRL) CTRL pull down resistor 400 800 1600 k Ω toff CTRL pulse width to shutdown CTRL high to low 2.5 ms tes_det Easy Scale detection time(1) CTRL pin low 260 ms tes_delay Easy Scale detection delay 100 ms tes_win Easy Scale detection window time Measured from CTRL high 1 ms VOLTAGE AND CURRENT CONTROL VREF Voltage feedback regulation voltage 196 200 204 mV Voltage feedback regulation voltage under VFB = 50 mV 47 50 53 V(REF_PWM) mV brightness control VFB = 20 mV 17 20 23 IFB Voltage feedback input bias current VFB = 200 mV 2 mA fS Oscillator frequency 1.0 1.2 1.5 MHz Dmax Maximum duty cycle VFB = 100 mV 90% 93% tmin_on Minimum on pulse width 40 ns Isink Comp pin sink current 100 mA Isource Comp pin source current 100 mA Gea Error amplifier transconductance 240 320 400 umho Rea Error amplifier output resistance 6 M Ω fea Error amplifier crossover frequency 5 pF connected to COMP 500 kHz POWER SWITCH N-channel MOSFET on-resistance VIN = 3.6 V 0.3 0.6 RDS(ON) Ω VIN = 3.0 V 0.7 ILN_NFET N-channel leakage current VSW = 35 V, TA = 25°C 1 mA OC and OLP ILIM N-Channel MOSFET current limit D = Dmax 0.96 1.2 1.44 A ILIM_Start Start up current limit D = Dmax 0.7 A tHalf_LIM Time step for half current limit 5 ms Vovp Open LED protection threshold Measured on the SW pin 37 38 39 V Open LED protection threshold on FB Measured on the FB pin, percentage of V(FB_OVP) 50% Vref, Vref = 200 mV and 20 mV tREF VREF filter time constant 180 ms Each step, Measured as number of tstep VREF ramp up time 213 ms cycles of the 1.2 MHz clock EasyScale TIMING tstart Start time of program stream 2 ms tEOS End time of program stream 2 360 ms tH_LB High time low bit Logic 0 2 180 ms tL_LB Low time low bit Logic 0 2 × tH_LB 360 ms (1) To select EasyScale™ mode, the CTRL pin has to be low for more than tes_det during tes_win. Copyright © 2007–2010, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): TPS61165 |
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