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CS8421-CZZ Datasheet(PDF) 24 Page - Cirrus Logic |
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CS8421-CZZ Datasheet(HTML) 24 Page - Cirrus Logic |
24 / 36 page 24 DS641F4 CS8421 4.6 Power Supply, Grounding, and PCB Layout The CS8421 operates from a VD = +2.5 V and VL = +3.3 V or +5.0 V supply. These supplies may be set independently. Follow normal supply decoupling practices; see Figure 6. Extensive use of power an d ground planes, ground-plane fill in unu sed areas, and surface-mount decou- pling capacitors are recommended. Decoupling capacitors should be mounted on the same side of the board as the CS8421 to minimize inductance effects, and all decoupling capacitors should be as close to the CS8421 as possible. The pin of the configuration resistors not connected to MS_SEL, SAIF, and SAOF should be connected as close as possible to VL or GND. The CS8421 is available in the compact QFN package. The underside of the QFN package reveals a metal pad that serves as a thermal relief to provide for optimal heat dissipation. This pad must mate with an equally dimensioned copper pad on the PCB and must be electrically connected to ground. A series of vias should be used to connect this copper pad to one or more larger ground planes on other PCB layers. |
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