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XM20C64 Datasheet(PDF) 2 Page - Xicor Inc. |
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XM20C64 Datasheet(HTML) 2 Page - Xicor Inc. |
2 / 11 page XM20C64 2 PIN DESCRIPTIONS Addresses (A0-A12) The address inputs select an 8-bit memory location during read and write operations. Chip Enable ( CE) The chip enable input must be LOW to enable all read, write and user requested nonvolatile operations. Output Enable ( OE) During normal RAM operations OE controls the data output buffers. If a hardware nonvolatile operation is selected ( NE = CE = LOW) and OE strobes LOW, a recall operation will be initiated. OE LOW will always disable a STORE operation regard- less of the state of NE, WE, and CE so long as the internal transfer has not commenced. Write Enable ( WE) During normal RAM operations WE = CE = LOW will cause data to be written to the RAM address pointed to by the A0-A12 inputs. Nonvolatile Enable ( NE) The nonvolatile input controls the transfer of data from the E2PROM array to the RAM array, when strobed LOW in conjunction with CE = OE = LOW. Data In/Data Out (I/O0-I/O7) Data is written to or read from the X20C64 through the I/O pins. The I/O pins are placed in the high impedance state when either CE or OE is HIGH or when NE is LOW. AUTOSTORE Output ( AS) AS is an open-drain output. When it is asserted (driving LOW) it indicates VCC has fallen below the AUTOSTORE threshold and an internal store operation has been initiated. Because AS is an open drain output it may be wire-ORed with multiple open drain outputs and used as an interrupt input to a microprocessor. DEVICE OPERATION NOVRAM operations are identical to those of a standard SRAM. When OE and CE are asserted data is presented at the I/Os from the address location pointed to by the A0–A12 inputs. RAM write operations are initiated and the address input is latched by the HIGH to LOW transition of CE or WE, whichever occurs last. Data is latched on the rising edge of either CE or WE, whichever occurs first. An array recall, E2PROM data transferred to RAM, is initiated whenever OE = NE = CE = LOW. A recall is also performed automatically upon power-up. Command Sequence Operations The X20C64 employs a version of the industry standard Software Data Protection (SDP). The end user can select various options for transferring data from RAM into the E2PROM array. All command sequences are comprised of three specific data/address write operations performed with NE LOW. A Store operation can be directly selected by issuing a Store command. The user may also enable and disable the AUTOSTORE function through the software data protection sequence. Refer to Table 1 below for a complete description of the command sequence. Operational Notes The X20C64 should be viewed as a subsystem when writing software for the various store operations. The module contains four discrete components each need- ing to be set to the required state individually. The two high order address bits (A11 and A12) select only one of the four components. |
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