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PD64001H Datasheet(PDF) 8 Page - Microsemi Corporation

Part # PD64001H
Description  1-Port PoE Manager
Download  14 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

PD64001H Datasheet(HTML) 8 Page - Microsemi Corporation

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Copyright © 2009
Microsemi
Rev. 1.3 2009-02-23
Analog Mixed Signal Group
2381 Morse Avenue, Irvine, CA 92614, USA; Phone (USA): (800) 713-4113, (ROW): (949) 221-7100 Fax: (949) 756-0308
8
switch’s pulse transformers, to minimize the length of
high current traces as well as RFI pick-up.
Ground & Power Planes - As the Chipset PoE
solution is a mixed-signal (analog and digital)
circuitry, special care must be taken when routing
the ground and power signals lines. Ground planes
are crucial for proper operation and should be
designed in accordance with the following
guidelines:
Separate analog and digital grounds, with
a gap of at least 40 mils.
Earth ground is used to tie in the metal
frame of the RJ-45 connectors. This
ground is to be routed separately and
connected to the switch’s metal
chassis/enclosure
Only a single connection point is to be
used between the digital and analog
grounds, in order to prevent ground loop
currents. This connection is to be
accomplished near the current loop
senses resistors R9, R11
The traces from Vmain input to the port
output, PoE switch (Q4) and sense
resistors must be designed to carry 1A
continuous current
Peripheral Components –
To prevent hot spots on the peripheral
components minimum distance of 5mm
should be maintained between the
powering Zener diodes D1 and D3, the
linear regulator U1, sense resistors R9 and
R11 (placed together) and current limit
MOSFET Q4. Other methods may be used
in order to dissipate the heat, such as
thermal copper planes at the top and
bottom layers with heat transfer vias
between them
Filtering capacitors for Vcc (U4 pins 5, 15)
are to be located close to these pins
The input and output capacitors of the
linear regulator should be placed close to
the regulator pins
The trace connecting the power MOSFET
and the sense resistors should be as short
as possible and the current loop sampling
trace should be connected as close as
possible to the sense resistors
Specifying PoE Power Supply_____
An intelligent selection of the power supply to be
used in conjunction with the 1-port system may avoid
the use of additional filtering circuitry (e.g. Front End
Common Mode filter) for standard regulatory
approval.
Electromagnetic compatibility requirements –
Typical Power over Ethernet (PoE) technology
systems are classified in most applications as
Information Technology Equipment (I.T.E).
The I.T.E should comply with three tests in order to
get a standard approval:
Conducted disturbance at mains ports (AC
input)
Radiated disturbance at a measuring
distance of 10m
Conducted common mode disturbance at
telecommunication ports (output port
containing Ethernet+Power)
A relatively new requirement of EN55022
that is mandatory as of August 1st, 2007
In most cases, the PSE side of a PoE system
incorporates a main AC to DC Switching Mode
Power Supply (SMPS) required for delivery of a DC
power to the PoE ports.
This power supply is most likely to be the largest
source for common mode noise injection on the
output ports wires, as its noisy output voltage is
super-imposed on the telecommunication wires by
the PoE control circuitry. The common mode noise is
generated by the high dv/dt and dI/dt switching rates
in power MOSFETs and high speed rectifying
diodes, common in SMPS designs.
As the system designer is usually responsible for
specifying this power supply, it is important to add
the standard requirements to the power supply
specifications and specify a specific reference test
setup to be used for the tests.
This reference test setup should be as similar as
possible to the final product, which means using the
same box material (plastic or metal) and the same
distance and polarity between the SMPS and PoE
circuitry.


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