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Copyright © 2009

Microsemi

Rev. 1.3 2009-02-23

Analog Mixed Signal Group

2381 Morse Avenue, Irvine, CA 92614, USA; Phone (USA): (800) 713-4113, (ROW): (949) 221-7100 Fax: (949) 756-0308

5

Pin Functionality__________

PIN

PIN NAME

PIN TYPE PIN DESCRIPTION

1

LOW_R_DETECT

Digital Output

Low level resistance

detection command

2

CURRENT_PWM

Digital Output

Current limit set PWM

output

3

AC_WAVE

Digital Output

AC disconnect output

wave

4

CLASS_PWM

Digital Output

Class voltage set PWM

output

5

VCC

VCC

5V Digital VCC

6

GND

GND

Digital ground

7

LED2

Digital Output

LED2 output command

8

LED1

Digital Output

LED1 output command

9

HIGH_R_DETECT

Digital Output

High level resistance

detection command

10

XRESET

Digital Input

Reset on/off command

from host

11

VMAIN_MEAS

Digital Output

Vmain measurement

command

12

PORT_OFF_IMEAS Digital I/O

Port Off command/

current measurement

input

13

R_DET_MEAS

Digital I/O

Port voltage

measurement input

14

AC_MEAS

Digital I/O

AC disconnect

measurement input

15

AVCC

VCC

5V Analog VCC

16

AGND

GND

Analog ground

17

PRE_DET

Digital Output

Pre detection

command

18

RESERVED1

Digital I/O

Reserved for

communication future

use

19

RMODE

Digital Input

POE manager mode

setup

20

RESERVED2

Digital I/O

Reserved for

communication future

use

R Mode Pin_________________

This pin is connected to a resistor voltage divider. It

allows the user to choose a combination of three

features, as specified in the following table:

R_mode

Voltage

ALT

A

ALT

B

CAP

AT/

720

mA

R8

(

Ω)*

0.313 –

X

1.02

0.94– 1.25

X

2.8K

1.563 –

X

X

5.23

2.19 – 2. 5

X

X

8.87

2.82– 3.1

X

X

14.7

3.44 –

X

X

25.5

4.06 –

X

X

X

54.9

4.68 – 5 V

X

X

X

No

* R8 Pull-down's value depends on the actual mode,

while for all of the modes, R7 Pull-up's value is

10Kohm.

The ALT A / ALT B option selects between a PSE

alternative A or PSE alternative B as specified in

section 33.2 of the standard. To implement a

Midspan PSE, use the ALT B option. The AT option

is IEEE802.3at- Compliant in accordance with the

IEEE802.3at-draft4.2. The CAP option is pre-

standard Capacitor detection mode.

General Application

Description

The circuit comprises the following major interfaces

with the Host board:

Control

A Reset control signal driven by the switch circuitry

is used to reset the PoE circuit. This signal should be

optically coupled by the Host in order to maintain the

requirements for the 1500 Vrms isolation.

Power Supply Mains

The PoE system operates over a range of 44V to

57V.

This power must be isolated from the switch supply

and chassis by 1500 Vrms.

Grounds

There are several grounds used in the system:

chassis, digital and analog. The chassis ground is

connected to the switch’s chassis ground.