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ADP1871 Datasheet(PDF) 22 Page - Analog Devices |
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ADP1871 Datasheet(HTML) 22 Page - Analog Devices |
22 / 44 page ![]() ADP1870/ADP1871 Rev. 0 | Page 22 of 44 SYNCHRONOUS RECTIFIER The ADP1870/ADP1871 employ an internal lower-side MOSFET driver to drive the external upper- and lower-side MOSFETs. The synchronous rectifier not only improves overall conduction efficiency, but also ensures proper charging to the bootstrap capacitor located at the upper-side driver input. This is beneficial during startup to provide sufficient drive signal to the external upper-side MOSFET and to attain fast turn-on response, which is essential for minimizing switching losses. The integrated upper- and lower-side MOSFET drivers operate in complementary fashion with built-in anticross conduction circuitry to prevent unwanted shoot-through current that may potentially damage the MOSFETs or reduce efficiency as a result of excessive power loss. POWER SAVING MODE (PSM) VERSION (ADP1871) The power saving mode version of the ADP1870 is the ADP1871. The ADP1871 operates in the discontinuous conduction mode (DCM) and pulse skips at light load to mid load currents. It outputs pulses as necessary to maintain output regulation. Unlike the continuous conduction mode (CCM), DCM operation prevents negative current, thus allowing improved system efficiency at light loads. Current in the reverse direction through this pathway, however, results in power dissipation and therefore a decrease in efficiency. HS HS AND LS ARE OFF OR IN IDLE MODE LS 0A ILOAD AS THE INDUCTOR CURRENT APPROACHES ZERO CURRENT, THE STATE MACHINE TURNS OFF THE LOWER-SIDE MOSFET. tON tOFF Figure 74. Discontinuous Mode of Operation (DCM) To minimize the chance of negative inductor current buildup, an on-board zero-cross comparator turns off all upper- and lower-side switching activities when the inductor current approaches the zero current line, causing the system to enter idle mode, where the upper- and lower-side MOSFETs are turned off. To ensure idle mode entry, a 10 mV offset, connected in series at the SW node, is implemented (see Figure 75). 10mV ZERO-CROSS COMPARATOR Q2 LS SW IQ2 Figure 75. Zero-Cross Comparator with 10 mV of Offset As soon as the forward current through the lower-side MOSFET decreases to a level where 10 mV = IQ2 × RON(Q2) the zero-cross comparator (or IREV comparator) emits a signal to turn off the lower-side MOSFET. From this point, the slope of the inductor current ramping down becomes steeper (see Figure 76) as the body diode of the lower-side MOSFET begins to conduct current and continues conducting current until the remaining energy stored in the inductor has been depleted. HS AND LS IN IDLE MODE 10mV = RON × ILOAD ZERO-CROSS COMPARATOR DETECTS 10mV OFFSET AND TURNS OFF LS SW LS 0A ILOAD tON ANOTHER tON EDGE IS TRIGGERED WHEN VOUT FALLS BELOW REGULATION Figure 76. 10 mV Offset to Ensure Prevention of Negative Inductor Current The system remains in idle mode until the output voltage drops below regulation. A PWM pulse is then produced, turning on the upper-side MOSFET to maintain system regulation. The ADP1871 does not have an internal clock, so it switches purely as a hysteretic controller as described in this section. TIMER OPERATION The ADP1870/ADP1871 employ a constant on-time architecture, which provides a variety of benefits, including improved load and line transient response when compared with a constant (fixed) frequency current-mode control loop of comparable loop design. The constant on-time timer, or tON timer, senses the high input voltage (VIN) and the output voltage (VOUT) using SW waveform information to produce an adjustable one-shot PWM pulse that varies the on-time of the upper-side MOSFET in response to dynamic changes in input voltage, output voltage, and load current conditions to maintain regulation. It then generates an on-time (tON) pulse that is inversely proportional to VIN. IN OUT ON V V K t × = where: K is a constant that is trimmed using an RC timer product for the 300 kHz, 600 kHz, and 1.0 MHz frequency options. |
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