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VG26VS18165C Datasheet(PDF) 7 Page - Vanguard International Semiconductor |
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VG26VS18165C Datasheet(HTML) 7 Page - Vanguard International Semiconductor |
7 / 27 page Document:1G5-0147 Rev.1 Page 7 VIS VG26(V)(S)18165C 1,048,576 x 16 - Bit CMOS Dynamic RAM DC Characteristics ; 5-Volt Version (Cont.) (Ta = 0 to + 70°C, VCC = + 5V %,VSS = 0V) Notes: 1. ICC is specified as an average current. It depends on output loading condition and cycle rate when the device is selected. ICC max is specified at the output open condition. 2. Address can be changed once or less while RAS = VIL. 3. For ICC4, address can be changed once or less within one EDO page mode cycle time. Parameter Symbol Test Conditions VG26(V)(S)18165C Unit Notes -5 -6 Min Max Min Max Input leakage current ILI + 0.5V -5 5 -5 5 Output leakage current ILO + 0.5V Dout = Disable -5 5 -5 5 Output high Voltage VOH IOH = - 5mA 2.4 - 2.4 - V Output low voltage VOL IOL = + 4.2mA - 0.4 - 0.4 V 10 ± 0V V I N V C C ≤ ≤ µA 0V V OUT V CC ≤ ≤ µA |
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