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VG26VS18165C Datasheet(PDF) 6 Page - Vanguard International Semiconductor |
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VG26VS18165C Datasheet(HTML) 6 Page - Vanguard International Semiconductor |
6 / 27 page Document:1G5-0147 Rev.1 Page 6 VIS VG26(V)(S)18165C 1,048,576 x 16 - Bit CMOS Dynamic RAM DC Characteristics; 5- Volt Verion (Ta = 0 to + 70 °C, VCC= + 5V %,VSS = 0V) Parameter Symbol Test Conditions VG26(V)(S)18165C Unit Notes -5 -6 Min Max Min Max Operating current ICC1 RAS cycling LCAS / UCAS cycling tRC = min - 120 - 110 mA 1, 2 Standby Current Low power S-version ICC2 TTL interface RAS, LCAS / UCAS = VIH Dout = High-Z - 2 - 2 mA CMOS interface RAS, -0.2V Dout = High-Z - 0.25 - 0.25 mA Standard power version TTL interface RAS,LCAS / UCAS = VIH Dout = High-Z 2 - 2 mA CMOS interface RAS, -0.2V Dout = High-Z 1 - 1 mA RAS-only refresh current ICC3 RAS cycling, LCAS / UCAS = VIH tRC = min - 120 - 110 mA 1, 2 EDO page mode current ICC4 tRC = min - 90 - 80 mA 1, 3 CAS-before-RAS refresh current ICC5 tRC = min RAS, LCAS / UCAS cycling - 120 - 110 mA 1, 2 Self-refresh current (S - Version) ICC8 - 350 - 350 CAS- before- RAS long refresh current (S-Version) ICC9 Standby: VCC- CAS before RAS refresh: 2048 cycles / 128ms RAS,LCAS / UCAS: VCC- (Max) Dout = High-Z, - 500 - 500 10 ± CAS Vcc ≥ CAS Vcc ≥ t RAS 100 µs ≥ µA 0.2V RAS ≤ 0V V IL 0.2V ≤ ≤ 0.2V V IH V IH ≤ ≤ t RAS 300ns ≤ µA |
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