 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
HY27UF082G2B Datasheet(PDF) 4 Page - Hynix Semiconductor |
|
|
|||||||||||||||||||||||||||||
HY27UF082G2B Datasheet(HTML) 4 Page - Hynix Semiconductor |
|
|
4 / 54 page  Rev 0.2 / Jan. 2008 4 1 HY27UF(08/16)2G2B Series 2Gbit (256Mx8bit) NAND Flash 1.SUMMARY DESCRIPTION Hynix NAND HY27UF(08/16)2G2B Series have 256Mx8bit with spare 8Mx8 bit capacity. The device is offered in 3.3V Vcc Power Supply, and with x8 and x16 I/O interface Its NAND cell provides the most cost-effective solution for the solid state mass storage market. The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. The device contains 2048 blocks, composed by 64 pages. A program operation allows to write the 2112-byte page in typi- cal 200us and an erase operation can be performed in typical 1.5ms on a 128K-byte block. Data in the page can be read out at 25ns cycle time per byte(x8). The I/O pins serve as the ports for address and data input/output as well as command input. This interface allows a reduced pin count and easy migration towards different densities, without any rearrangement of footprint. Commands, Data and Addresses are synchronously introduced using CE, WE, RE, ALE and CLE input pin. The on-chip Program/Erase Controller automates all read, program and erase functions including pulse repetition, where required, and internal verification and margining of data. The modify operations can be locked using the WP input. The output pin R/B (open drain buffer) signals the status of the device during each operation. In a system with multiple mem- ories the R/B pins can be connected all together to provide a global status signal. The copy back function allows the optimization of defective blocks management. When a page program operation fails the data can be directly programmed in another page inside the same array section without the time consuming serial data insertion phase. Copy back operation automatically executes embedded error detection operation: 1 bit error every 528byte (x8) or 1bit error out of every 264-word (x16) can be detected. Due to this feature, it is no more nor neces- sary nor recommended to use external 2-bit ECC to detect copy back operation errors. Data read out after copy back read (both for single and multiplane cases) is allowed. Even the write-intensive systems can take advantage of the HY27UF(08/16)2G2B Series extended reliability of 100K pro- gram/erase cycles by supporting ECC (Error Correcting Code) with real time mapping-out algorithm. The chip supports CE don’t care function. This function allows the direct download of the code from the NAND Flash memory device by a micro- controller, since the CE transitions do not stop the read operation. This device includes also extra features like OTP/Unique ID area, Read ID2 extension. The HY27UF(08/16)2G2B Series are available in 48-TSOP1 12 x 20 mm, 63-FBGA 9 x 11mm, 52-ULGA 12 x 17 mm. 1.1 Product List PART NUMBER ORGANIZATION Vcc RANGE PACKAGE HY27UF082G2B x8 2.7V ~ 3.6V 48-TSOP1, 63-FBGA, 52-ULGA HY27UF162G2B x16 48-TSOP1 |
Similar Part No. - HY27UF082G2B |
|
Similar Description - HY27UF082G2B |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
