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HY27UF082G2B Datasheet(PDF) 14 Page - Hynix Semiconductor |
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HY27UF082G2B Datasheet(HTML) 14 Page - Hynix Semiconductor |
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14 / 54 page  Rev 0.2 / Jan. 2008 14 1 HY27UF(08/16)2G2B Series 2Gbit (256Mx8bit) NAND Flash 3.6 Copy-back Program Copy-Back program with Read for Copy-Back is configured to quickly and efficiently rewrite data stored in one page without data reloading when the bit error is not in data stored. Since the time-consuming re-loading cycles are removed, the system performance is improved. The benefit is especially obvious when a portion of a block is updated and the rest of the block also needs to be copied to the newly assigned free block. Copy-Back operation is a sequen- tial execution of Read for Copy-Back and of copy-back program with the destination page address. A read operation with "35h" command and the address of the source page moves the whole 2112byte data into the internal data buffer. A bit error is checked by sequential reading the data output. In the case where there is no bit error, the data do not need to be reloaded. Therefore Copy-Back program operation is initiated by issuing Page-Copy Data-Input command (85h) with destination page address. Actual programming operation begins after Program Confirm command (10h) is issued. Once the program process starts, the Read Status Register command (70h) may be entered to read the status register. The system controller can detect the completion of a program cycle by monitoring the R/B output, or the Sta- tus bit(I/O 6) of the Status Register. When the Copy-Back Program is complete, the Write Status Bit(I/O 0) may be checked(Figure 18 & Figure 18). The command register remains in Read Status command mode until another valid command is written to the command register. During copy-back program, data modification is possible using random data input command (85h) as shown in Figure19. Copy-back program operation is allowed only within same plane. 3.7 Multi-Plane Copy-Back Program The copy-back program is configured to quickly and efficiently rewrite data stored in one page without utilizing an external memory. Since the time-consuming cycles of serial access and re-loading cycles are removed, the system performance is greatly improved. The benefit is especially obvious when a portion of a block needs to be updated and the rest of the block also need to be copied to the newly assigned free block. The operation for performing a copy-back program is a sequential execution of page-read without serial access and copying-program with the address of destination page. A read operation with "35h" command and the address of the source page moves the whole 2112byte data into the internal data buffer. As soon as the device returns to Ready state, optional data read-out is allowed by toggling RE (See Figure 23), or Copy Back command (85h) with the address cycles of destination page may be written. The Program Confirm command (10h) is required to actually begin the programming operation. Data input cycle for modifying a portion or multiple distant portions of the source page is allowed as shown in Figure 23. Most NAND devices require 2 bit external ECC only due to copy back operation while 1 bit ECC can be enough for all other operation. Reason is that during read for copy back + copy back program sequence a bit error due to charge loss is not checked by external error detection/correction scheme. On the contrary, 2Gbit NAND includes automatic Error Detection Code during copy back operation: thanks to this, 2 bit external ECC is no more required, with signifi- cant advantage for customers that can always use single bit ECC. More details on EDC operation are available in sec- tion 3.8. |
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