Rev. 1.4 / July 2006

25

HY5PS12821(L)F

HY5PS121621(L)F

VREF. In differential mode, these timing relationships are measured relative to the crosspoint of DQS and

its complement, DQS. This distinction in timing methods is guaranteed by design and characterization.

Note that when differential data strobe mode is disabled via the EMRS, the complementary pin, DQS, must

be tied externally to VSS through a 20 ohm to 10 K ohm resistor to insure proper operation.

5. AC timings are for linear signal transitions. See System Derating for other signal transitions.

6. These parameters guarantee device behavior, but they are not necessarily tested on each device. They

may be guaranteed by device design or tester correlation.

7. All voltages referenced to VSS.

8. Tests for AC timing, IDD, and electrical (AC and DC) characteristics, may be conducted at nominal refer-

ence/supply voltage levels, but the related specifications and device operation are guaranteed for the full

voltage range specified.

DQS

DQS

D

DMin

DQS/

DQ

DM

Figure -- Data input (write) timing

DMin

DMin

DMin

D

D

D

DQS

CK

CK

CK/CK

DQS/DQS

DQ

DQS

DQS

Q

Figure -- Data output (read) timing

Q

Q

Q