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HY5PS12421F-E3 Datasheet(PDF) 33 Page - Hynix Semiconductor

Part # HY5PS12421F-E3
Description  512Mb DDR2 SDRAM
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

HY5PS12421F-E3 Datasheet(HTML) 33 Page - Hynix Semiconductor

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Rev. 1.4 / July 2006
33
1HY5PS12421(L)F
HY5PS12821(L)F
HY5PS121621(L)F
these points when the device is no longer driving (tRPST), or begins driving (tRPRE) by measuring the signal at two
20. Input waveform timing with differential data strobe enabled MR[bit10] =0, is referenced from the input signal cross-
ing at the VIH(ac) level to the differential data strobe crosspoint for a rising signal, and from the input signal crossing at
the VIL(ac) level to the differential data strobe crosspoint for a falling signal applied to the device under test.
21. Input waveform timing with differential data strobe enabled MR[bit10]=0, is referenced from the input signal cross-
ing at the VIH(dc) level to the differential data strobe crosspoint for a rising signal and VIL(dc) to the differential data
strobe crosspoint for a falling signal applied to the device under test.
22. Input waveform timing is referenced from the input signal crossing at the VIH(ac) level for a rising signal and VIL(ac)
for a falling signal applied to the device under test.
23. Input waveform timing is referenced from the input signal crossing at the VIL(dc) level for a rising signal and VIH(dc)
for a falling signal applied to the device under test.
tHZ , tRPST end point = 2*T1-T2
tLZ , tRPRE begin point = 2*T1-T2
VOH + xmV
VOH + 2xmV
VOL + 1xmV
VOL + 2xmV
tHZ
tRPST end point
VTT + 2xmV
VTT + xmV
VTT -xmV
VTT - 2xmV
tHZ
tRPRE begin point
DQS
VDDQ
VIH(ac)min
VIH(dc)min
tDH
tDS
DQS
VREF(dc)
VSS
VIL(dc)max
VIL(ac)max
tDH
tDS
Differential Input waveform timing


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