Rev. 1.4 / July 2006

27

HY5PS12821(L)F

HY5PS121621(L)F

Although for slow slew rates the total setup time might be negative(i.e. a valid input signal will not have reached VIH/IL(ac) at the time

of the rising clock transition) a valid input signal is still required to complete the transition and reach VIH/IL(ac).

For slew rate in between the values listed in table x, the derating valued may obtained by linear interpolation.

These values are typically not subject to production test. They are verified by design and characterization.

Fig. a Illustration of nominal slew rate for tIS,tDS

CK,DQS

Vss

Delta TF

Delta TR

region

nominal

slew rate

nominal

slew rate

Setup Slew Rate

Falling Signal

=

Delta TF

Setup Slew Rate

Rising Signal

=

Delta TR

CK, DQS