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HY5DU573222FP-28 Datasheet(PDF) 3 Page - Hynix Semiconductor |
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HY5DU573222FP-28 Datasheet(HTML) 3 Page - Hynix Semiconductor |
3 / 30 page 1HY5DU573222F(P) Rev. 1.1 / May. 2005 3 DESCRIPTION The Hynix HY5DU573222 is a 268,435,456-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for the point-to-point applications which requires high bandwidth. The Hynix 8Mx32 DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the /CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are inter- nally pipelined and 2-bit prefetched to achieve very high bandwidth. All input and output voltage levels are compatible with SSTL_2. FEATURES • The Hynix HY5DU573222F(P) guarantee until 200MHz speed at DLL_off condition •2.5V VDD and VDDQ wide range max power supply supports • All inputs and outputs are compatible with SSTL_2 interface • 12mm x 12mm, 144ball FBGA with 0.8mm pin pitch • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous - data transaction aligned to bidirectional data strobe (DQS0 ~ DQS3) • Data outputs on DQS edges when read (edged DQ) Data inputs on DQS centers when write (centered DQ) • Data(DQ) and Write masks(DM) latched on the both rising and falling edges of the data strobe • All addresses and control inputs except Data, Data strobes and Data masks latched on the rising edges of the clock • Write mask byte controls by DM (DM0 ~ DM3) • Programmable /CAS Latency 5 / 4 / 3 supported • Programmable Burst Length 2 / 4 / 8 with both sequential and interleave mode • Internal 4 bank operations with single pulsed /RAS • tRAS Lock-Out function supported • Auto refresh and self refresh supported • 4096 refresh cycles / 32ms • Half strength and Matched Impedance driver option ORDERING INFORMATION Note) Hynix supports Lead free parts for each speed grade with same specification, except Lead free materials. We'll add "P" character after "F" for Lead free product. For example, the part number of 300MHz Lead free product is HY5DU573222FP-33. Part No. Power Supply Clock Frequency Max Data Rate interface Package HY5DU573222F(P)-2 VDD/ VDDQ = 2.5V 500MHz 1000Mbps/pin SSTL_2 12mm x 12mm 144Ball FBGA HY5DU573222F(P)-22 450MHz 900Mbps/pin HY5DU573222F(P)-25 400MHz 800Mbps/pin HY5DU573222F(P)-28 350MHz 700Mbps/pin HY5DU573222F(P)-33 300MHz 600Mbps/pin HY5DU573222F(P)-36 275MHz 550Mbps/pin HY5DU573222F(P)-4 250MHz 500Mbps/pin HY5DU573222F(P)-5 200MHz 400Mbps/pin |
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