HY5DU573222FP-28 datasheet(24/30 Pages) HYNIX

Part #	HY5DU573222FP-28

Description	256M(8Mx32) GDDR SDRAM

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Manufacturer	HYNIX [Hynix Semiconductor]

Direct Link	http://www.skhynix.com/kor/main.do

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24 / 30 page

1HY5DU573222F(P)

Rev. 1.1 / May. 2005

24

AC CHARACTERISTICS - I (AC operating conditions unless otherwise noted)

Parameter

Symbol

2

22

25

28

Unit Note

Min

Max

Min

Max

Min

Max

Min

Max

Row Cycle Time

tRC

23

-

22

-

19

-

17

-

CK

Auto Refresh Row Cycle Time

tRFC

25

-

24

-

21

-

19

-

CK

Row Active Time

tRAS

15

100K

14

100K

12

100K

11

100K

CK

Row Address to Column Address Delay for

Read

tRCDRD

8

-

7-

6

-

6-

CK

Row Address to Column Address Delay for

Write

tRCDWR

5

-

4-

3

-

3-

CK

Row Active to Row Active Delay

tRRD

5

-

4-

4

-

4-

CK

Column Address to Column Address Delay

tCCD

1

-

1-

1

-

1-

CK

Row Precharge Time

tRP

8

-

7-

6

-

6-

CK

Write Recovery Time

tWR

5

-

4-

3

-

3-

CK

Last Data-In to Read Command

tDRL

3

-

2-

2

-

2-

CK

Auto Precharge Write Recovery +

Precharge Time

tDAL

13

-

11

-

9

-

9

-

CK

System Clock Cycle Time

CL=5

tCK

2

10

2.2

10

2.5

10

-

ns

CL=4

tCK

--

-

2.8

10

ns

Clock High Level Width

tCH

0.45

0.55

0.45

0.55

0.45

0.55

0.45

0.55

CK

Clock Low Level Width

tCL

0.45

0.55

0.45

0.55

0.45

0.55

0.45

0.55

CK

Data-Out edge to Clock edge Skew

tAC

-0.60.6-0.60.6

-0.6

0.6-0.60.6

ns

DQS-Out edge to Clock edge Skew

tDQSCK

-0.60.6-0.60.6

-0.6

0.6-0.60.6

ns

DQS-Out edge to Data-Out edge Skew

tDQSQ

-

0.35

-

0.35

-

0.35

-

0.35

ns

Data-Out hold time from DQS

tQH

tHPmin

-tQHS

-

tHPmin

-tQHS

-

tHPmin

-tQHS

-

tHPmin

-tQHS

-

ns

1,6

Clock Half Period

tHP

tCH/L

min

-

tCH/L

min

-

tCH/L

min

-

tCH/L

min

-

ns

1,5

Data Hold Skew Factor

tQHS

-

0.35

-

0.35

-

0.35

-

0.35

ns

6

Input Setup Time

tIS

0.6

-

0.75

-

0.75

-

0.75

-

ns

2

Input Hold Time

tIH

0.6

-

0.75

-

0.75

-

0.75

-

ns

2

Write DQS High Level Width

tDQSH

0.4

0.6

0.4

0.6

0.4

0.6

0.4

0.6

CK

Write DQS Low Level Width

tDQSL

0.4

0.6

0.4

0.6

0.4

0.6

0.4

0.6

CK

Clock to First Rising edge of DQS-In

tDQSS

0.85

1.15

0.85

1.15

0.85

1.15

0.85

1.15

CK

Data-In Setup Time to DQS-In (DQ & DM)

tDS

0.35

-

0.35

-

0.35

-

0.35

-

ns

3

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