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HY5DU12822DT-D43 Datasheet(PDF) 6 Page - Hynix Semiconductor |
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HY5DU12822DT-D43 Datasheet(HTML) 6 Page - Hynix Semiconductor |
6 / 29 page Rev. 1.0 / May 2007 6 1HY5DU12822D(L)TP HY5DU121622D(L)TP FUNCTIONAL BLOCK DIAGRAM (64Mx8) 4Banks x 16Mbit x 8 I/O Double Data Rate Synchronous DRAM Mode Register Command Decoder CLK /CLK CKE /CS /RAS /CAS /WE DM Bank Control Mode Register Row Decoder 16Mx8 BANK 0 16Mx8 BANK 1 16Mx8 BANK 2 16Mx8 BANK 3 Memory Cell Array Column Decoder Address Buffer A0 A1 A max BA0 BA1 Column Address Counter 8 DQ0 DQ7 DS 16 Write Data Register 2-bit Prefetch Unit 8 16 Data Strobe Transmitter Data Strobe Receiver DQS DS DLL Block CLK, /CLK CLK_DLL Mode Register |
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