h5du5182etr-fac datasheet(21/29 Pages) HYNIX

Part #	H5DU5182ETR-FAC

Description	512Mb DDR SDRAM

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Manufacturer	HYNIX [Hynix Semiconductor]

Direct Link	http://www.skhynix.com/kor/main.do

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21 / 29 page

Rev. 1.0 / Nov. 2009

21

1H5DU5182ETR

H5DU5162ETR

AC OPERATING CONDITIONS (TA=0 to 70 oC, Voltage referenced to VSS = 0V)

Note:

1. V

ID is the magnitude of the difference between the input level on CK and the input on /CK.

2. The value of V

IX is expected to equal 0.5*VDDQ of the transmitting device and must track variations in the DC level of the same.

*For more information about AC Overshoot/Undershoot Specifications, refer to “Device Operation” section in hynix website.

AC OPERATING TEST CONDITIONS (TA=0 to 70oC, Voltage referenced to VSS = 0V)

Parameter

Symbol

Min

Max

Unit

Input High (Logic 1) Voltage, DQ, DQS and DM signals

V

IH(AC)

V

REF + 0.31

-

V

Input Low (Logic 0) Voltage, DQ, DQS and DM signals

V

IL(AC)

-

V

REF - 0.31

V

Input Differential Voltage, CK and /CK inputs1

V

ID(AC)

0.7

V

DDQ + 0.6

V

Input Crossing Point Voltage, CK and /CK inputs2

V

IX(AC)

0.5*V

DDQ-0.2

0.5*V

DDQ+0.2

V

Parameter

Value

Unit

Reference Voltage

V

DDQ x 0.5

V

Termination Voltage

V

DDQ x 0.5

V

AC Input High Level Voltage (VIH, min)

V

REF + 0.31

V

AC Input Low Level Voltage (VIL, max)

V

REF - 0.31

V

Input Timing Measurement Reference Level Voltage

V

REF

V

Output Timing Measurement Reference Level Voltage

V

TT

V

Input Signal maximum peak swing

1.5

V

Input minimum Signal Slew Rate

1

V/ns

Termination Resistor (RT)

50

Ω

Series Resistor (RS)

25

W

Output Load Capacitance for Access Time Measurement (CL)

30

pF

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