H5PS5162FFR-C datasheet(21/39 Pages) HYNIX

Part #	H5PS5162FFR-C

Description	512Mb DDR2 SDRAM

Download	39 Pages

Scroll/Zoom	100%

Manufacturer	HYNIX [Hynix Semiconductor]

Direct Link	http://www.skhynix.com/kor/main.do

Logo

21 / 39 page

Rev. 1.0 / July. 2008

21

Release

H5PS5162FFR series

Parameter

Symbol

DDR2-667

DDR2-800

Unit

Note

min

max

min

max

DQ output access time from CK/CK

tAC

-450

+450

-400

+400

ps

DQS output access time from CK/CK

tDQSCK

-400

+400

-350

+350

ps

CK high-level width

tCH

0.45

0.55

0.45

0.55

tCK

CK low-level width

tCL

0.45

0.55

0.45

0.55

tCK

CK half period

tHP

min(tCL,

tCH)

-

min(tCL,

tCH)

-

ps

11,12

Clock cycle time, CL=x

tCK

3000

8000

2500

ps

15

DQ and DM input setup time

tDS(base)

100

-

50

-

ps

6,7,8,2

0

DQ and DM input hold time

tDH

(base)

175

-

125

-

ps

6,7,8,2

1

Control & Address input pulse width for

each input

tIPW

0.6

-

0.6

-

tCK

DQ and DM input pulse width for each

input

tDIPW

0.35

-

0.35

-

tCK

Data-out high-impedance time from CK/

CK

tHZ

-

tAC max

-

tAC max

ps

18

DQS low-impedance time from CK/CK

tLZ(DQS)

tAC min

tAC max

tAC min

tAC max

ps

18

DQ low-impedance time from CK/CK

tLZ(DQ)

2*tAC min

tAC max

2*tAC min

tAC max

ps

18

DQS-DQ skew for DQS and associated

DQ signals

tDQSQ

-

240

-200

ps

13

DQ hold skew factor

tQHS

-

340

-300

ps

12

DQ/DQS output hold time from DQS

tQH

tHP - tQHS

-

tHP - tQHS

-

ps

First DQS latching transition to

associated clock edge

tDQSS

- 0.25

+ 0.25

- 0.25

+ 0.25

tCK

DQS input high pulse width

tDQSH

0.35

-

0.35

-

tCK

DQS input low pulse width

tDQSL

0.35

-

0.35

-

tCK

DQS falling edge to CK setup time

tDSS

0.2

-

0.2

-

tCK

DQS falling edge hold time from CK

tDSH

0.2

-

0.2

-

tCK

Mode register set command cycle time

tMRD

2

-

2

-

tCK

Write postamble

tWPST

0.4

0.6

0.4

0.6

tCK

10

Write preamble

tWPRE

0.35

-

0.35

-

tCK

Address and control input setup time

tIS(base)

200

-

175

-

ps

5,7,9,2

2

Address and control input hold time

tIH(base)

275

-

250

-

ps

5,7,9,2

3

Read preamble

tRPRE

0.9

1.1

0.9

1.1

tCK

19

Read postamble

tRPST

0.4

0.6

0.4

0.6

tCK

19

Activate to precharge command

tRAS

45

70000

45

70000

ns

3

Active to active command period for 1KB

page size products

tRRD

7.5

-7.5

-

ns

4

Active to active command period for 2KB

page size products

tRRD

10

-10

-

ns

4

Similar Part No. - H5PS5162FFR-C

Manufacturer	Part #	Datasheet	Description
Hynix Semiconductor	H5PS5162FFR-C4	530Kb / 39P	512Mb DDR2 SDRAM

More results

Similar Description - H5PS5162FFR-C

Manufacturer	Part #	Datasheet	Description
Hynix Semiconductor	HY5PS12421AFP	1Mb / 37P	512Mb DDR2 SDRAM
	HY5PS12421F	623Kb / 35P	512Mb DDR2 SDRAM
	HY5PS12421FP	622Kb / 35P	512Mb DDR2 SDRAM
	H5PS5182GFR	1Mb / 64P	512Mb DDR2 SDRAM
Nanya Technology Corpor...	NT5TU64M8EE	3Mb / 96P	DDR2 512Mb SDRAM
Hynix Semiconductor	HY5PS12421F-E3	1Mb / 35P	512Mb DDR2 SDRAM
	HY5PS12421CFP-E3I	618Kb / 38P	512Mb DDR2 SDRAM
	HY5PS12421CFP-E3	619Kb / 38P	512Mb DDR2 SDRAM
	H5PS5162FFR-E3	530Kb / 39P	512Mb DDR2 SDRAM
	HY5PS12421BFP-E3	628Kb / 38P	512Mb DDR2 SDRAM

More results

H5PS5162FFR-C Datasheet(PDF) 21 Page - Hynix Semiconductor

H5PS5162FFR-C Datasheet(HTML) 21 Page - Hynix Semiconductor

Similar Part No. - H5PS5162FFR-C

Similar Description - H5PS5162FFR-C

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39

Datasheet Download

Link URL