max16068 datasheet(11/40 Pages) MAXIM

Part #	MAX16068

Description	6-Channel, Flash-Configurable System Manager with Nonvolatile Fault Registers

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______________________________________________________________________________________ 11

6-Channel, Flash-Configurable System Manager

with Nonvolatile Fault Registers

When in the monitoring state, and when EN falls below

the undervoltage threshold, a register bit, ENRESET

(r20h[2]), is set to a ‘1.’ This register bit latches and must

be cleared through software. This bit indicates if RESET

asserted low due to EN going under the threshold. The

POR state of ENRESET is ‘0.’ The bit is only set on a fall-

ing edge of the EN comparator output or the software

enable bit. If operating in latch-on fault mode, toggle

EN or toggle the software enable bit to clear the latch

condition and restart the device once the fault condition

has been removed.

Set r73h[2] to ‘1’ to enable monitoring functionality.

Faults are not recorded when the device is in margining

mode. Set r73h[2] to ‘0’ for normal functionality.

Voltage Monitoring

The MAX16068 features an internal 10-bit ADC that mon-

itors the MON_ voltage inputs. An internal multiplexer

cycles through each of the enabled inputs, taking less

than 24Fs for a complete monitoring cycle. Each acquisi-

tion takes approximately 4Fs. At each multiplexer stop,

the 10-bit ADC converts the analog input to a digital

result and stores the result in a register. ADC conversion

results are stored in registers r00h–r0Bh (see Table 2).

Use the SMBus or JTAG serial interface to read ADC

conversion results.

The MAX16068 provides six inputs, MON1–MON6, for

voltage monitoring. Each input-voltage range is pro-

grammable in registers r43h–r44h (see Table 3). When

MON_ configuration registers are set to ’11,’ MON_ volt-

ages are not monitored and the multiplexer does not stop

at these inputs, decreasing the total cycle time. These

inputs cannot be configured to trigger fault conditions.

The two programmable thresholds for each monitored

voltage include an overvoltage and an undervoltage

threshold. See the Faults section for more information

on setting overvoltage and undervoltage thresholds. All

voltage thresholds are 8 bits wide. The 8 MSBs of the

10-bit ADC conversion result are compared to these

overvoltage and undervoltage thresholds.

For any undervoltage or overvoltage condition to be

monitored and any faults detected, the MON_ input must

be assigned to monitoring mode. Inputs that are not

enabled are not converted by the ADC; they contain the

last value acquired before that channel was disabled.

The ADC conversion result registers are reset to 00h at

boot-up. These registers are not reset when a reboot

command is executed.

To temporarily disable voltage monitoring during volt-

age margining conditions, set r73h[2] to ‘1’ to enable

margining mode functionality. Faults (except for faults

triggered by EXTFAULT being pulled low externally) are

not recorded when the device is in margining mode, but

the ADC continues to run and conversion results con-

tinue to be available. Set r73h[2] back to ‘0’ for normal

functionality.

Table 2. ADC Conversion Results (Read Only)

REGISTER ADDRESS

BIT RANGE

DESCRIPTION

00h

[7:0]

MON1 result (MSB)

01h

[7:6]

MON1 result (LSB)

02h

[7:0]

MON2 result (MSB)

03h

[7:6]

MON2 result (LSB)

04h

[7:0]

MON3 result (MSB)

05h

[7:6]

MON3 result (LSB)

06h

[7:0]

MON4 result (MSB)

07h

[7:6]

MON4 result (LSB)

08h

[7:0]

MON5 result (MSB)

09h

[7:6]

MON5 result (LSB)

0Ah

[7:0]

MON6 result (MSB)

0Bh

[7:6]

MON6 result (LSB)

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