MAX16068 datasheet(21/40 Pages) MAXIM

Part #	MAX16068

Description	6-Channel, Flash-Configurable System Manager with Nonvolatile Fault Registers

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Manufacturer	MAXIM [Maxim Integrated Products]

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______________________________________________________________________________________ 21

6-Channel, Flash-Configurable System Manager

with Nonvolatile Fault Registers

Watchdog Timer

The watchdog timer operates together with or indepen-

dently of the MAX16068. When operating in dependent

mode, the watchdog is not activated until RESET is

deasserted. When operating in independent mode,

the watchdog timer activates immediately after VCC

exceeds the UVLO threshold and the boot phase is

complete. Set r73h[4] to ‘0’ to configure the watchdog

in dependent mode. Set r73h[4] to ‘1’ to configure the

watchdog in independent mode. See Table 16 for more

information on configuring the watchdog timer in depen-

dent or independent mode. The watchdog timer can be

reset by toggling the WDI inputs (GPIO4) or by writing a

‘1’ to r75h[5].

Dependent Watchdog Timer Operation

Use the watchdog timer to monitor FP activity in two

modes. Flexible timeout architecture provides an adjust-

able watchdog startup delay of up to 300s, allowing

complicated systems to complete lengthy boot-up rou-

tines. An adjustable watchdog timeout allows the super-

visor to provide quick alerts when the processor activity

fails. After each reset event (VCC drops below UVLO

then returns above UVLO, software reboot, manual reset

(MR), EN input going low then high, or watchdog reset),

the watchdog startup delay provides an extended time

for the system to power up and fully initialize all FP and

system components before assuming responsibility for

routine watchdog updates. Set r76h[6:4] to a value other

than ‘000’ to enable the watchdog startup delay. Set

r76h[6:4] to ‘000’ to disable the watchdog startup delay.

The normal watchdog timeout period, tWDI, begins after

the first transition on WDI before the conclusion of the

long startup watchdog period, tWDI_STARTUP (Figures 3

and 4). During the normal operating mode, WDO asserts

if the FP does not toggle WDI with a valid transition (high-

to-low or low-to-high) within the standard timeout period,

tWDI. WDO remains asserted until WDI is toggled or

RESET is asserted (Figure 4).

While EN is low, the watchdog timer is in reset. The

watchdog timer does not begin counting until the moni-

toring starts and RESET is deasserted. The watchdog

timer is reset and WDO deasserts any time RESET is

asserted (Figure 5). The watchdog timer is held in reset

while RESET is asserted.

Figure 3. Normal Watchdog Startup Sequence

Figure 4. Watchdog Timer Operation

LAST MON_

WDI

VTH

tWDI_STARTUP

< tWDI

tRP

RESET

< tWDI

WDI

WDO

0V

VCC

0V

VCC

<tWDI

> tWDI

< tWDI

tWDI

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