MAX16067 datasheet(39/47 Pages) MAXIM

Part #	MAX16067

Description	6-Channel, Flash-Configurable System Manager with Nonvolatile Fault Registers

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Manufacturer	MAXIM [Maxim Integrated Products]

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______________________________________________________________________________________ 39

6-Channel, Flash-Configurable System Manager

with Nonvolatile Fault Registers

Update-DR: A falling edge on TCK while in the update-

DR state latches the data from the shift register path of

the test data registers into a set of output latches. This

prevents changes at the parallel output because of

changes in the shift register. On the rising edge of TCK,

the controller goes to the run-test/idle state if TMS is low

or goes to the select-DR-scan state if TMS is high.

Select-IR-Scan: All test data registers retain the previ-

ous states. The instruction register remains unchanged

during this state. With TMS low, a rising edge on TCK

moves the controller into the capture-IR state. TMS high

during a rising edge on TCK puts the controller back into

the test-logic-reset state.

Capture-IR: Use the capture-IR state to load the shift

register in the instruction register with a fixed value.

This value is loaded on the rising edge of TCK. If TMS is

high on the rising edge of TCK, the controller enters the

exit1-IR state. If TMS is low on the rising edge of TCK,

the controller enters the shift-IR state.

Shift-IR: In this state, the shift register in the instruction

register connects between TDI and TDO and shifts data

one stage for every rising edge of TCK toward the TDO

serial output while TMS is low. The parallel outputs of

the instruction register as well as all test data registers

remain at the previous states. A rising edge on TCK with

TMS high moves the controller to the exit1-IR state. A

rising edge on TCK with TMS low keeps the controller in

the shift-IR state while moving data one stage through

the instruction shift register.

Exit1-IR: A rising edge on TCK with TMS low puts the

controller in the pause-IR state. If TMS is high on the ris-

ing edge of TCK, the controller enters the update-IR state.

Pause-IR: Shifting of the instruction shift register halts

temporarily. With TMS high, a rising edge on TCK puts

the controller in the exit2-IR state. The controller remains

in the pause-IR state if TMS is low during a rising edge

on TCK.

Exit2-IR: A rising edge on TCK with TMS high puts the

controller in the update-IR state. The controller loops

back to shift-IR if TMS is low during a rising edge of TCK

in this state.

Update-IR: The instruction code that has been shifted

into the instruction shift register latches to the parallel

outputs of the instruction register on the falling edge of

TCK as the controller enters this state. Once latched,

this instruction becomes the current instruction. A rising

edge on TCK with TMS low puts the controller in the run-

test/idle state. With TMS high, the controller enters the

select-DR-scan state.

Instruction Register

The instruction register contains a shift register as well

as a latched 5-bit wide parallel output. When the TAP

controller enters the shift-IR state, the instruction shift

register connects between TDI and TDO. While in the

shift-IR state, a rising edge on TCK with TMS low shifts

the data one stage toward the serial output at TDO. A

rising edge on TCK in the exit1-IR state or the exit2-IR

state with TMS high moves the controller to the update-

IR state. The falling edge of that same TCK latches the

data in the instruction shift register to the instruction

register parallel output. Table 28 shows the instructions

supported by the MAX16067 and the respective opera-

tional binary codes.

Table 28. JTAG Instruction Set

INSTRUCTION

CODE

NOTES

BYPASS

0x1F

Mandatory instruction code

IDCODE

0x00

Load manufacturer ID code/part number

USERCODE

0x03

Load user code

LOAD ADDRESS

0x04

Load address register content

READ DATA

0x05

Read data pointed by current address

WRITE DATA

0x06

Write data pointed by current address

REBOOT

0x07

Reboot FLASH data content into register file

SAVE

0x08

Trigger emergency save to flash

SETFLSHADD

0x09

Flash page access ON

RSTFLSHADD

0x0A

Flash page access OFF

SETUSRFLSH

0x0B

User flash access ON (must be in flash page already)

RSTUSRFLSH

0x0C

User flash access OFF (return to flash page)

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