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MAX16067 Datasheet(PDF) 38 Page - Maxim Integrated Products |
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MAX16067 Datasheet(HTML) 38 Page - Maxim Integrated Products |
38 / 47 page ![]() 38 _____________________________________________________________________________________ 6-Channel, Flash-Configurable System Manager with Nonvolatile Fault Registers Figure 14. Tap Controller State Diagram Test Access Port (TAP) Controller State Machine The TAP controller is a finite state machine that responds to the logic level at TMS on the rising edge of TCK. See Figure 14 for a diagram of the finite state machine. The possible states are described as follows: Test-Logic-Reset: At power-up, the TAP controller is in the test-logic-reset state. The instruction register contains the IDCODE instruction. All system logic of the device operates normally. This state can be reached from any state by driving TMS high for five clock cycles. Run-Test/Idle: The run-test/idle state is used between scan operations or during specific tests. The instruction register and test data registers remain idle. Select-DR-Scan: All test data registers retain their previ- ous state. With TMS low, a rising edge of TCK moves the controller into the capture-DR state and initiates a scan sequence. TMS high during a rising edge on TCK moves the controller to the select-IR-scan state. Capture-DR: Data can be parallel-loaded into the test data registers selected by the current instruction. If the instruction does not call for a parallel load or the selected test data register does not allow parallel loads, the test data register remains at its current value. On the rising edge of TCK, the controller goes to the shift-DR state if TMS is low or it goes to the exit1-DR state if TMS is high. Shift-DR: The test data register selected by the current instruction connects between TDI and TDO and shifts data one stage toward its serial output on each rising edge of TCK while TMS is low. On the rising edge of TCK, the controller goes to the exit1-DR state if TMS is high. Exit1-DR: While in this state, a rising edge on TCK puts the controller in the update-DR state. A rising edge on TCK with TMS low puts the controller in the pause-DR state. Pause-DR: Shifting of the test data registers halts while in this state. All test data registers retain their previous state. The controller remains in this state while TMS is low. A rising edge on TCK with TMS high puts the con- troller in the exit2-DR state. Exit2-DR: A rising edge on TCK with TMS high while in this state puts the controller in the update-DR state. A ris- ing edge on TCK with TMS low enters the shift-DR state. TEST-LOGIC-RESET 1 1 1 1 0 0 RUN-TEST/IDLE 0 0 0 0 1 1 1 0 0 1 0 1 1 0 1 0 1 SELECT-DR-SCAN SELECT-IR-SCAN CAPTURE-DR CAPTURE-IR SHIFT-DR SHIFT-IR EXIT1-DR EXIT1-IR PAUSE-DR PAUSE-IR EXIT2-DR EXIT2-IR UPDATE-DR UPDATE-IR 0 0 0 0 1 1 0 1 1 |
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