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MAX16067 Datasheet(PDF) 35 Page - Maxim Integrated Products

Part # MAX16067
Description  6-Channel, Flash-Configurable System Manager with Nonvolatile Fault Registers
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX16067 Datasheet(HTML) 35 Page - Maxim Integrated Products

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______________________________________________________________________________________ 35
6-Channel, Flash-Configurable System Manager
with Nonvolatile Fault Registers
6) The master sends the 8-bit byte count (1 byte to 16
bytes), n.
7) The addressed slave asserts an ACK on SDA.
8) The master sends 8 bits of data.
9) The addressed slave asserts an ACK on SDA.
10) Repeat steps 8 and 9 n - 1 times.
11) The master sends a STOP condition.
When PEC is enabled, the block write protocol becomes:
1) The master sends a START condition.
2) The master sends the 7-bit slave ID plus a write bit
(low).
3) The addressed slave asserts an ACK on the data
line.
4) The master sends 8 bits of the block write command
code.
5) The slave asserts an ACK on the data line.
6) The master sends 8 bits byte count (min 1, max 16) n.
7) The slave asserts an ACK on the data line.
8) The master sends 8 bits of data.
9) The slave asserts an ACK on the data line.
10) Repeat 8 and 9 n - 1 times.
11) The master sends an 8-bit PEC byte.
12) The slave asserts an ACK on the data line (if PEC is
good, otherwise NACK).
13) The master generates a STOP condition.
Block Read
The block read protocol (see Figure 12) allows the
master device to read a block of up to 16 bytes from
memory. Read fewer than 16 bytes of data by issuing
an early STOP condition from the master, or by generat-
ing a NACK with the master. The destination address
should be preloaded by a previous send byte command;
otherwise, the block read command begins to read at
the current address pointer. If the number of bytes to
be read causes the address pointer to exceed 8Fh for
the configuration register or configuration flash or FFh
in user flash, the address pointer stays at 8Fh or FFh,
respectively.
The block read procedure is the following:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a
write bit (low).
3) The addressed slave asserts an ACK on SDA.
4) The master sends 8 bits of the block read command
(95h).
5) The slave asserts an ACK on SDA, unless busy.
6) The master generates a REPEATED START condi-
tion.
7) The master sends the 7-bit slave address and a
read bit (high).
8) The slave asserts an ACK on SDA.
9) The slave sends the 8-bit byte count (16).
10) The master asserts an ACK on SDA.
11) The slave sends 8 bits of data.
12) The master asserts an ACK on SDA.
13) Repeat steps 11 and 12 up to fifteen times.
14) The master asserts a NACK on SDA.
15) The master sends a STOP condition.
When PEC is enabled, the block read protocol becomes:
1) The master sends a START condition.
2) The master sends the 7-bit slave ID plus a write bit
(low).
3) The addressed slave asserts an ACK on the data
line.
4
The master sends 8 bits of the block read command
code.
5) The slave asserts an ACK on the data line unless
busy.
6) The master sends a REPEATED START condition.
7) The master sends the 7-bit slave ID plus a read bit
(high).
8) The slave asserts an ACK on the data line.
9) The slave sends 8-bit byte count (16).
10) The master asserts an ACK on the data line.
11) The slave sends 8 bits of data.
12) The master asserts an ACK on the data line.
13) Repeat 11 and 12 up to 15 times.
14) The slave sends an 8-bit PEC byte.
15) The master asserts a NACK on the data line.
16) The master generates a STOP condition.


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