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AT45DB081D Datasheet(PDF) 9 Page - ATMEL Corporation |
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AT45DB081D Datasheet(HTML) 9 Page - ATMEL Corporation |
9 / 54 page 9 3596L–DFLASH–04/09 AT45DB081D 7.4 Page Erase The Page Erase command can be used to individually erase any page in the main memory array allowing the Buffer to Main Memory Page Program to be utilized at a later time. To perform a page erase in the DataFlash standard page size (264 bytes), an opcode of 81H must be loaded into the device, followed by three address bytes comprised of 3 don’t care bits, 12 page address bits (PA11 - PA0) that specify the page in the main memory to be erased and 9 don’t care bits. To perform a page erase in the binary page size (256 bytes), the opcode 81H must be loaded into the device, followed by three address bytes consist of 4 don’t care bits, 12 page address bits (A19 - A8) that specify the page in the main memory to be erased and 8 don’t care bits. When a low-to-high transition occurs on the CS pin, the part will erase the selected page (the erased state is a logical 1). The erase operation is internally self-timed and should take place in a maxi- mum time of tPE. During this time, the status register will indicate that the part is busy. 7.5 Block Erase A block of eight pages can be erased at one time. This command is useful when large amounts of data has to be written into the device. This will avoid using multiple Page Erase Commands. To perform a block erase for the DataFlash standard page size (264 bytes), an opcode of 50H must be loaded into the device, followed by three address bytes comprised of 3 don’t care bits, 9 page address bits (PA11 -PA3) and 12 don’t care bits. The 9 page address bits are used to specify which block of eight pages is to be erased. To perform a block erase for the binary page size (256 bytes), the opcode 50H must be loaded into the device, followed by three address bytes consisting of 4 don’t care bits, 9 page address bits (A19 - A11) and 11 don’t care bits. The 9 page address bits are used to specify which block of eight pages is to be erased. When a low- to-high transition occurs on the CS pin, the part will erase the selected block of eight pages. The erase operation is internally self-timed and should take place in a maximum time of tBE. During this time, the status register will indicate that the part is busy. Table 7-1. Block Erase Addressing PA11/ A19 PA10/ A18 PA9/ A17 PA8/ A16 PA7/ A15 PA6/ A14 PA5/ A13 PA4/ A12 PA3/ A11 PA2/ A10 PA1/ A9 PA0/ A8 Block 0 000 000 00 X X X 0 0 000 000 01 X X X 1 0 000 000 10 X X X 2 0 000 000 11 X X X 3 • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 1 111 111 00 X X X 508 1 111 111 01 X X X 509 1 111 111 10 X X X 510 1 111 111 11 X X X 511 |
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